Louis Heredero HEL
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HEL commented on issue HEL/chronos#10 2025-07-09 20:13:34 +00:00
feature request: possibility to remove dotted lines

Thank you for using chronos and taking the time to open this issue ! Removing the dotted line is indeed not currently possible Hereunder are some workarounds (including yours)

I will also…

HEL commented on issue HEL/circuiteria#10 2025-06-29 13:21:23 +00:00
IEC gates support

closed by #11

HEL closed issue HEL/circuiteria#10 2025-06-29 13:21:23 +00:00
IEC gates support
HEL pushed to dev at HEL/circuiteria 2025-06-29 13:19:59 +00:00
693676d61a Merge pull request 'feature: add IEC gates' (#11) from bono/circuiteria:add_iec_gates into dev
94d5d6b854 add examples and add iec gates to manual
71f128f6c9 fix typo in xnor gate
ea8277ee5b rename iec gates to have consistent naming
c5e4f8039a improve iec-gate
Compare 8 commits »
HEL merged pull request HEL/circuiteria#11 2025-06-29 13:19:57 +00:00
feature: add IEC gates
HEL approved HEL/circuiteria#11 2025-06-29 13:18:45 +00:00
feature: add IEC gates
HEL commented on pull request HEL/circuiteria#11 2025-06-24 22:12:54 +00:00
feature: add IEC gates

Should be element.gate-iec-buf instead of element.iec-gate-buf

HEL commented on pull request HEL/circuiteria#11 2025-06-24 22:12:54 +00:00
feature: add IEC gates

Should be element.gate-iec-not instead of element.iec-gate-not

HEL commented on pull request HEL/circuiteria#11 2025-06-24 22:12:54 +00:00
feature: add IEC gates

Should be element.gate-iec-nor instead of element.iec-gate-nor

HEL commented on pull request HEL/circuiteria#11 2025-06-24 22:12:54 +00:00
feature: add IEC gates

Should be element.gate-iec-or instead of element.iec-gate-or

HEL commented on pull request HEL/circuiteria#11 2025-06-24 22:12:54 +00:00
feature: add IEC gates

Should be element.gate-iec-xor instead of element.iec-gate-xor

HEL commented on pull request HEL/circuiteria#11 2025-06-24 22:12:54 +00:00
feature: add IEC gates

Should be element.gate-iec-xnor instead of element.iec-gate-xnor

HEL approved HEL/circuiteria#11 2025-06-24 22:12:54 +00:00
feature: add IEC gates

Typos in documentation refs

HEL commented on pull request HEL/circuiteria#11 2025-06-24 22:06:28 +00:00
feature: add IEC gates

This for loop can also be simplified because we don't need to find intersections with the gate's contour (rectangular):

HEL commented on pull request HEL/circuiteria#11 2025-06-24 22:03:43 +00:00
feature: add IEC gates

Here you can simplify this function greatly by just drawing a rectangle:

HEL commented on pull request HEL/circuiteria#11 2025-06-24 22:02:33 +00:00
feature: add IEC gates

Hey 👋, this looks pretty good, thanks for contributing ! I would just try to simplify the drawing process, since they are basically rectangles (see following comments)

I'll also add examples…

HEL commented on issue HEL/circuiteria#10 2025-06-21 07:41:30 +00:00
IEC gates support

They don't seem too hard to add I might have a go at it but I can't promise a deadline You can take a look at how other logic gates are implemented in the time being

HEL pushed to main at HEL/FunProg-Scala 2025-05-20 12:00:22 +00:00
b7ca6610fc added final exam
HEL pushed to main at HEL/FunProg-Scala 2025-05-19 20:06:18 +00:00
ec0e1e8ae4 added final exam preparation
HEL commented on issue HEL/rivet-typst#8 2025-05-14 09:24:56 +00:00
Data gaps

It's okay for me to modify the schema internally It is somehow already the case in structure.load for example, where some properties are extracted and formatted from the input data