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dstadelm
/
circuiteria
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c9aa81af2ebe88e242090c29d616e005a4a8a17b
circuiteria
/
src
/
elements
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LordBaryhobal
b646d24930
fix: handle y port alignment with gates
2026-06-30 21:07:52 +02:00
..
logic
fix: handle y port alignment with gates
2026-06-30 21:07:52 +02:00
alu.typ
refactor: centralize cetz import
2026-06-30 18:48:34 +02:00
block.typ
docs: add radius parameter for block
2026-06-30 19:02:08 +02:00
element.typ
refactor: centralize cetz import
2026-06-30 18:48:34 +02:00
extender.typ
refactor: centralize cetz import
2026-06-30 18:48:34 +02:00
group.typ
refactor: centralize cetz import
2026-06-30 18:48:34 +02:00
multiplexer.typ
refactor: centralize cetz import
2026-06-30 18:48:34 +02:00
ports.typ
refactor: centralize cetz import
2026-06-30 18:48:34 +02:00