98 lines
5.4 KiB
C
98 lines
5.4 KiB
C
/**
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@Generated PIC10 / PIC12 / PIC16 / PIC18 MCUs Source File
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@Company:
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Microchip Technology Inc.
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@File Name:
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mcc.c
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@Summary:
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This is the device_config.c file generated using PIC10 / PIC12 / PIC16 / PIC18 MCUs
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@Description:
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This header file provides implementations for driver APIs for all modules selected in the GUI.
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Generation Information :
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Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.8
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Device : PIC18F26K83
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Driver Version : 2.00
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The generated drivers are tested against the following:
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Compiler : XC8 2.36 and above or later
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MPLAB : MPLAB X 6.00
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*/
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/*
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(c) 2018 Microchip Technology Inc. and its subsidiaries.
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Subject to your compliance with these terms, you may use Microchip software and any
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derivatives exclusively with Microchip products. It is your responsibility to comply with third party
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license terms applicable to your use of third party software (including open source software) that
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may accompany Microchip software.
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THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER
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EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY
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IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS
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FOR A PARTICULAR PURPOSE.
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IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
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INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
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WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP
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HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO
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THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
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CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT
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OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS
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SOFTWARE.
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*/
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// Configuration bits: selected in the GUI
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// CONFIG1L
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#pragma config FEXTOSC = OFF // External Oscillator Selection->Oscillator not enabled
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#pragma config RSTOSC = HFINTOSC_64MHZ // Reset Oscillator Selection->HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1
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// CONFIG1H
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#pragma config CLKOUTEN = OFF // Clock out Enable bit->CLKOUT function is disabled
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#pragma config PR1WAY = ON // PRLOCKED One-Way Set Enable bit->PRLOCK bit can be cleared and set only once
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#pragma config CSWEN = ON // Clock Switch Enable bit->Writing to NOSC and NDIV is allowed
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#pragma config FCMEN = ON // Fail-Safe Clock Monitor Enable bit->Fail-Safe Clock Monitor enabled
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// CONFIG2L
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#pragma config MCLRE = EXTMCLR // MCLR Enable bit->If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR
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#pragma config PWRTS = PWRT_OFF // Power-up timer selection bits->PWRT is disabled
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#pragma config MVECEN = OFF // Multi-vector enable bit->Interrupt contoller does not use vector table to prioritze interrupts
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#pragma config IVT1WAY = ON // IVTLOCK bit One-way set enable bit->IVTLOCK bit can be cleared and set only once
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#pragma config LPBOREN = OFF // Low Power BOR Enable bit->ULPBOR disabled
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#pragma config BOREN = SBORDIS // Brown-out Reset Enable bits->Brown-out Reset enabled , SBOREN bit is ignored
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// CONFIG2H
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#pragma config BORV = VBOR_2P45 // Brown-out Reset Voltage Selection bits->Brown-out Reset Voltage (VBOR) set to 2.45V
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#pragma config ZCD = OFF // ZCD Disable bit->ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON
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#pragma config PPS1WAY = ON // PPSLOCK bit One-Way Set Enable bit->PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle
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#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit->Stack full/underflow will cause Reset
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#pragma config DEBUG = OFF // Debugger Enable bit->Background debugger disabled
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#pragma config XINST = OFF // Extended Instruction Set Enable bit->Extended Instruction Set and Indexed Addressing Mode disabled
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// CONFIG3L
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#pragma config WDTCPS = WDTCPS_31 // WDT Period selection bits->Divider ratio 1:65536; software control of WDTPS
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#pragma config WDTE = OFF // WDT operating mode->WDT Disabled; SWDTEN is ignored
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// CONFIG3H
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#pragma config WDTCWS = WDTCWS_7 // WDT Window Select bits->window always open (100%); software control; keyed access not required
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#pragma config WDTCCS = SC // WDT input clock selector->Software Control
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// CONFIG4L
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#pragma config BBSIZE = BBSIZE_512 // Boot Block Size selection bits->Boot Block size is 512 words
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#pragma config BBEN = OFF // Boot Block enable bit->Boot block disabled
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#pragma config SAFEN = OFF // Storage Area Flash enable bit->SAF disabled
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#pragma config WRTAPP = OFF // Application Block write protection bit->Application Block not write protected
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// CONFIG4H
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#pragma config WRTB = OFF // Boot Block Write Protection bit->Boot Block not write-protected
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#pragma config WRTC = OFF // Configuration Register Write Protection bit->Configuration registers (300000-30000Bh) not write-protected
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#pragma config WRTD = OFF // Data EEPROM Write Protection bit->Data EEPROM not write-protected
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#pragma config WRTSAF = OFF // SAF Write protection bit->SAF not Write Protected
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#pragma config LVP = ON // Low Voltage Programming Enable bit->Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored
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// CONFIG5L
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#pragma config CP = OFF // PFM and Data EEPROM Code Protection bit->PFM and Data EEPROM code protection disabled
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