Initial commit

306-controller_interface.X/mcc_generated_files/memory.c

@@ -0,0 +1,206 @@
+/**
+  MEMORY Generated Driver File
+
+  @Company
+    Microchip Technology Inc.
+
+  @File Name
+    memory.c
+
+  @Summary
+    This is the generated driver implementation file for the MEMORY driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs
+
+  @Description
+    This file provides implementations of driver APIs for MEMORY.
+    Generation Information :
+        Product Revision  :  PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.8
+        Device            :  PIC18F26K83
+        Driver Version    :  2.1.3
+    The generated drivers are tested against the following:
+        Compiler          :  XC8 2.36 and above
+        MPLAB             :  MPLAB X 6.00
+*/
+
+/*
+    (c) 2018 Microchip Technology Inc. and its subsidiaries. 
+    
+    Subject to your compliance with these terms, you may use Microchip software and any 
+    derivatives exclusively with Microchip products. It is your responsibility to comply with third party 
+    license terms applicable to your use of third party software (including open source software) that 
+    may accompany Microchip software.
+    
+    THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 
+    EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY 
+    IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS 
+    FOR A PARTICULAR PURPOSE.
+    
+    IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 
+    INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 
+    WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP 
+    HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO 
+    THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL 
+    CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT 
+    OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS 
+    SOFTWARE.
+*/
+
+/**
+  Section: Included Files
+*/
+
+#include <xc.h>
+#include "memory.h"
+
+
+/**
+  Section: Flash Module APIs
+*/
+
+uint8_t FLASH_ReadByte(uint32_t flashAddr)
+{
+	NVMCON1bits.NVMREG = 2;
+    TBLPTRU = (uint8_t)((flashAddr & 0x00FF0000) >> 16);
+    TBLPTRH = (uint8_t)((flashAddr & 0x0000FF00)>> 8);
+    TBLPTRL = (uint8_t)(flashAddr & 0x000000FF);
+
+    asm("TBLRD");
+
+    return (TABLAT);
+}
+
+uint16_t FLASH_ReadWord(uint32_t flashAddr)
+{
+    return ((((uint16_t)FLASH_ReadByte(flashAddr+1))<<8)|(FLASH_ReadByte(flashAddr)));
+}
+
+void FLASH_WriteByte(uint32_t flashAddr, uint8_t *flashRdBufPtr, uint8_t byte)
+{
+    uint32_t blockStartAddr = (uint32_t)(flashAddr & ((END_FLASH-1) ^ (ERASE_FLASH_BLOCKSIZE-1)));
+    uint8_t offset = (uint8_t)(flashAddr & (ERASE_FLASH_BLOCKSIZE-1));
+    uint8_t i;
+
+    // Entire row will be erased, read and save the existing data
+    for (i=0; i<ERASE_FLASH_BLOCKSIZE; i++)
+    {
+        flashRdBufPtr[i] = FLASH_ReadByte((blockStartAddr+i));
+    }
+
+    // Load byte at offset
+    flashRdBufPtr[offset] = byte;
+
+    // Writes buffer contents to current block
+    FLASH_WriteBlock(blockStartAddr, flashRdBufPtr);
+}
+
+int8_t FLASH_WriteBlock(uint32_t writeAddr, uint8_t *flashWrBufPtr)
+{
+    uint32_t blockStartAddr  = (uint32_t )(writeAddr & ((END_FLASH-1) ^ (ERASE_FLASH_BLOCKSIZE-1)));
+    uint8_t GIEBitValue = INTCON0bits.GIE;     // Save interrupt enable
+    uint8_t i;
+
+    // Flash write must start at the beginning of a row
+    if( writeAddr != blockStartAddr )
+    {
+        return -1;
+    }
+
+    // Block erase sequence
+    FLASH_EraseBlock(writeAddr);
+
+    // Block write sequence
+    TBLPTRU = (uint8_t)((writeAddr & 0x00FF0000) >> 16);    // Load Table point register
+    TBLPTRH = (uint8_t)((writeAddr & 0x0000FF00)>> 8);
+    TBLPTRL = (uint8_t)(writeAddr & 0x000000FF);
+
+    // Write block of data
+    for (i=0; i<WRITE_FLASH_BLOCKSIZE; i++)
+    {
+        TABLAT = flashWrBufPtr[i];  // Load data byte
+
+        if (i == (WRITE_FLASH_BLOCKSIZE-1))
+        {
+            asm("TBLWT");
+        }
+        else
+        {
+            asm("TBLWTPOSTINC");
+        }
+    }
+
+    NVMCON1bits.NVMREG = 2;
+    NVMCON1bits.WREN = 1;	
+    INTCON0bits.GIE = 0; // Disable interrupts	
+    NVMCON2 = 0x55;
+    NVMCON2 = 0xAA;
+    NVMCON1bits.WR = 1; // Start program
+	INTCON0bits.GIE = GIEBitValue; // Restore interrupt enable
+    NVMCON1bits.WREN = 0; // Disable writes to memory
+
+    return 0;
+}
+
+void FLASH_EraseBlock(uint32_t baseAddr)
+{
+    uint8_t GIEBitValue = INTCON0bits.GIE;   // Save interrupt enable
+
+    TBLPTRU = (uint8_t)((baseAddr & 0x00FF0000) >> 16);
+    TBLPTRH = (uint8_t)((baseAddr & 0x0000FF00)>> 8);
+    TBLPTRL = (uint8_t)(baseAddr & 0x000000FF);
+
+    NVMCON1bits.NVMREG = 2;
+    NVMCON1bits.WREN = 1;
+    NVMCON1bits.FREE = 1;	
+    INTCON0bits.GIE = 0; // Disable interrupts	
+    NVMCON2 = 0x55;
+    NVMCON2 = 0xAA;
+    NVMCON1bits.WR = 1; // Start program
+	INTCON0bits.GIE = GIEBitValue; // Restore interrupt enable
+    NVMCON1bits.WREN = 0; // Disable writes to memory
+}
+
+/**
+  Section: Data EEPROM Module APIs
+*/
+
+void DATAEE_WriteByte(uint16_t bAdd, uint8_t bData)
+{
+    uint8_t GIEBitValue = INTCON0bits.GIE;
+
+    NVMADRH = (uint8_t)((bAdd >> 8) & 0x03);
+    NVMADRL = (uint8_t)(bAdd & 0xFF);
+    NVMDAT = bData;
+    NVMCON1bits.NVMREG = 0;
+    NVMCON1bits.WREN = 1;
+    INTCON0bits.GIE = 0;     // Disable interrupts
+    NVMCON2 = 0x55;
+    NVMCON2 = 0xAA;
+    NVMCON1bits.WR = 1;
+    // Wait for write to complete
+    while (NVMCON1bits.WR)
+    {
+    }
+
+    NVMCON1bits.WREN = 0;
+    INTCON0bits.GIE = GIEBitValue;   // restore interrupt enable
+}
+
+uint8_t DATAEE_ReadByte(uint16_t bAdd)
+{
+    NVMADRH = (uint8_t)((bAdd >> 8) & 0x03);
+    NVMADRL = (uint8_t)(bAdd & 0xFF);
+    NVMCON1bits.NVMREG = 0;
+    NVMCON1bits.RD = 1;
+    NOP();  // NOPs may be required for latency at high frequencies
+    NOP();
+
+    return (NVMDAT);
+}
+
+void MEMORY_Tasks( void )
+{
+    /* TODO : Add interrupt handling code */
+    PIR0bits.NVMIF = 0;
+}
+/**
+ End of File
+*/