1307 lines
39 KiB
C
1307 lines
39 KiB
C
/**
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******************************************************************************
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* @file stm32f7xx_hal_sdram.c
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* @author MCD Application Team
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* @brief SDRAM HAL module driver.
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* This file provides a generic firmware to drive SDRAM memories mounted
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* as external device.
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@verbatim
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==============================================================================
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##### How to use this driver #####
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==============================================================================
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[..]
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This driver is a generic layered driver which contains a set of APIs used to
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control SDRAM memories. It uses the FMC layer functions to interface
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with SDRAM devices.
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The following sequence should be followed to configure the FMC to interface
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with SDRAM memories:
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(#) Declare a SDRAM_HandleTypeDef handle structure, for example:
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SDRAM_HandleTypeDef hsdram
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(++) Fill the SDRAM_HandleTypeDef handle "Init" field with the allowed
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values of the structure member.
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(++) Fill the SDRAM_HandleTypeDef handle "Instance" field with a predefined
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base register instance for NOR or SDRAM device
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(#) Declare a FMC_SDRAM_TimingTypeDef structure; for example:
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FMC_SDRAM_TimingTypeDef Timing;
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and fill its fields with the allowed values of the structure member.
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(#) Initialize the SDRAM Controller by calling the function HAL_SDRAM_Init(). This function
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performs the following sequence:
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(##) MSP hardware layer configuration using the function HAL_SDRAM_MspInit()
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(##) Control register configuration using the FMC SDRAM interface function
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FMC_SDRAM_Init()
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(##) Timing register configuration using the FMC SDRAM interface function
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FMC_SDRAM_Timing_Init()
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(##) Program the SDRAM external device by applying its initialization sequence
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according to the device plugged in your hardware. This step is mandatory
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for accessing the SDRAM device.
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(#) At this stage you can perform read/write accesses from/to the memory connected
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to the SDRAM Bank. You can perform either polling or DMA transfer using the
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following APIs:
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(++) HAL_SDRAM_Read()/HAL_SDRAM_Write() for polling read/write access
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(++) HAL_SDRAM_Read_DMA()/HAL_SDRAM_Write_DMA() for DMA read/write transfer
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(#) You can also control the SDRAM device by calling the control APIs HAL_SDRAM_WriteOperation_Enable()/
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HAL_SDRAM_WriteOperation_Disable() to respectively enable/disable the SDRAM write operation or
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the function HAL_SDRAM_SendCommand() to send a specified command to the SDRAM
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device. The command to be sent must be configured with the FMC_SDRAM_CommandTypeDef
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structure.
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(#) You can continuously monitor the SDRAM device HAL state by calling the function
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HAL_SDRAM_GetState()
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*** Callback registration ***
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=============================================
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[..]
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The compilation define USE_HAL_SDRAM_REGISTER_CALLBACKS when set to 1
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allows the user to configure dynamically the driver callbacks.
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Use Functions HAL_SDRAM_RegisterCallback() to register a user callback,
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it allows to register following callbacks:
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(+) MspInitCallback : SDRAM MspInit.
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(+) MspDeInitCallback : SDRAM MspDeInit.
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This function takes as parameters the HAL peripheral handle, the Callback ID
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and a pointer to the user callback function.
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Use function HAL_SDRAM_UnRegisterCallback() to reset a callback to the default
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weak (surcharged) function. It allows to reset following callbacks:
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(+) MspInitCallback : SDRAM MspInit.
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(+) MspDeInitCallback : SDRAM MspDeInit.
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This function) takes as parameters the HAL peripheral handle and the Callback ID.
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By default, after the HAL_SDRAM_Init and if the state is HAL_SDRAM_STATE_RESET
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all callbacks are reset to the corresponding legacy weak (surcharged) functions.
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Exception done for MspInit and MspDeInit callbacks that are respectively
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reset to the legacy weak (surcharged) functions in the HAL_SDRAM_Init
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and HAL_SDRAM_DeInit only when these callbacks are null (not registered beforehand).
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If not, MspInit or MspDeInit are not null, the HAL_SDRAM_Init and HAL_SDRAM_DeInit
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keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
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Callbacks can be registered/unregistered in READY state only.
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Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
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in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
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during the Init/DeInit.
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In that case first register the MspInit/MspDeInit user callbacks
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using HAL_SDRAM_RegisterCallback before calling HAL_SDRAM_DeInit
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or HAL_SDRAM_Init function.
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When The compilation define USE_HAL_SDRAM_REGISTER_CALLBACKS is set to 0 or
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not defined, the callback registering feature is not available
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and weak (surcharged) callbacks are used.
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@endverbatim
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f7xx_hal.h"
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/** @addtogroup STM32F7xx_HAL_Driver
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* @{
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*/
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#ifdef HAL_SDRAM_MODULE_ENABLED
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/** @defgroup SDRAM SDRAM
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* @brief SDRAM driver modules
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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static void SDRAM_DMACplt(DMA_HandleTypeDef *hdma);
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static void SDRAM_DMACpltProt(DMA_HandleTypeDef *hdma);
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static void SDRAM_DMAError(DMA_HandleTypeDef *hdma);
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup SDRAM_Exported_Functions SDRAM Exported Functions
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* @{
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*/
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/** @defgroup SDRAM_Exported_Functions_Group1 Initialization and de-initialization functions
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* @brief Initialization and Configuration functions
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*
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@verbatim
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==============================================================================
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##### SDRAM Initialization and de_initialization functions #####
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==============================================================================
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[..]
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This section provides functions allowing to initialize/de-initialize
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the SDRAM memory
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@endverbatim
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* @{
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*/
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/**
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* @brief Performs the SDRAM device initialization sequence.
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* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
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* the configuration information for SDRAM module.
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* @param Timing Pointer to SDRAM control timing structure
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
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{
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/* Check the SDRAM handle parameter */
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if (hsdram == NULL)
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{
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return HAL_ERROR;
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}
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if (hsdram->State == HAL_SDRAM_STATE_RESET)
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{
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/* Allocate lock resource and initialize it */
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hsdram->Lock = HAL_UNLOCKED;
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#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
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if (hsdram->MspInitCallback == NULL)
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{
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hsdram->MspInitCallback = HAL_SDRAM_MspInit;
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}
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hsdram->RefreshErrorCallback = HAL_SDRAM_RefreshErrorCallback;
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hsdram->DmaXferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
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hsdram->DmaXferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
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/* Init the low level hardware */
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hsdram->MspInitCallback(hsdram);
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#else
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/* Initialize the low level hardware (MSP) */
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HAL_SDRAM_MspInit(hsdram);
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#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
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}
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/* Initialize the SDRAM controller state */
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hsdram->State = HAL_SDRAM_STATE_BUSY;
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/* Initialize SDRAM control Interface */
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(void)FMC_SDRAM_Init(hsdram->Instance, &(hsdram->Init));
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/* Initialize SDRAM timing Interface */
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(void)FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank);
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/* Update the SDRAM controller state */
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hsdram->State = HAL_SDRAM_STATE_READY;
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return HAL_OK;
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}
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/**
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* @brief Perform the SDRAM device initialization sequence.
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* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
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* the configuration information for SDRAM module.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram)
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{
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#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
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if (hsdram->MspDeInitCallback == NULL)
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{
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hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
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}
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/* DeInit the low level hardware */
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hsdram->MspDeInitCallback(hsdram);
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#else
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/* Initialize the low level hardware (MSP) */
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HAL_SDRAM_MspDeInit(hsdram);
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#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
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/* Configure the SDRAM registers with their reset values */
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(void)FMC_SDRAM_DeInit(hsdram->Instance, hsdram->Init.SDBank);
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/* Reset the SDRAM controller state */
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hsdram->State = HAL_SDRAM_STATE_RESET;
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/* Release Lock */
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__HAL_UNLOCK(hsdram);
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return HAL_OK;
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}
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/**
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* @brief SDRAM MSP Init.
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* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
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* the configuration information for SDRAM module.
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* @retval None
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*/
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__weak void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hsdram);
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/* NOTE: This function Should not be modified, when the callback is needed,
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the HAL_SDRAM_MspInit could be implemented in the user file
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*/
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}
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/**
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* @brief SDRAM MSP DeInit.
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* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
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* the configuration information for SDRAM module.
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* @retval None
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*/
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__weak void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hsdram);
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/* NOTE: This function Should not be modified, when the callback is needed,
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the HAL_SDRAM_MspDeInit could be implemented in the user file
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*/
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}
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/**
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* @brief This function handles SDRAM refresh error interrupt request.
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* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
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* the configuration information for SDRAM module.
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* @retval HAL status
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*/
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void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram)
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{
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/* Check SDRAM interrupt Rising edge flag */
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if (__FMC_SDRAM_GET_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_IT))
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{
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/* SDRAM refresh error interrupt callback */
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#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
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hsdram->RefreshErrorCallback(hsdram);
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#else
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HAL_SDRAM_RefreshErrorCallback(hsdram);
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#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
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/* Clear SDRAM refresh error interrupt pending bit */
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__FMC_SDRAM_CLEAR_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_ERROR);
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}
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}
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/**
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* @brief SDRAM Refresh error callback.
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* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
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* the configuration information for SDRAM module.
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* @retval None
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*/
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__weak void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hsdram);
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/* NOTE: This function Should not be modified, when the callback is needed,
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the HAL_SDRAM_RefreshErrorCallback could be implemented in the user file
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*/
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}
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/**
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* @brief DMA transfer complete callback.
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* @param hdma pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA module.
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* @retval None
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*/
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__weak void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hdma);
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/* NOTE: This function Should not be modified, when the callback is needed,
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the HAL_SDRAM_DMA_XferCpltCallback could be implemented in the user file
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*/
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}
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/**
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* @brief DMA transfer complete error callback.
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* @param hdma DMA handle
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* @retval None
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*/
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__weak void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hdma);
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/* NOTE: This function Should not be modified, when the callback is needed,
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the HAL_SDRAM_DMA_XferErrorCallback could be implemented in the user file
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*/
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}
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/**
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* @}
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*/
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/** @defgroup SDRAM_Exported_Functions_Group2 Input and Output functions
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* @brief Input Output and memory control functions
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*
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@verbatim
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==============================================================================
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##### SDRAM Input and Output functions #####
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==============================================================================
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[..]
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This section provides functions allowing to use and control the SDRAM memory
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@endverbatim
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* @{
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*/
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/**
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* @brief Reads 8-bit data buffer from the SDRAM memory.
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* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
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* the configuration information for SDRAM module.
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* @param pAddress Pointer to read start address
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* @param pDstBuffer Pointer to destination buffer
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* @param BufferSize Size of the buffer to read from memory
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer,
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uint32_t BufferSize)
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{
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uint32_t size;
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__IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
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uint8_t *pdestbuff = pDstBuffer;
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HAL_SDRAM_StateTypeDef state = hsdram->State;
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/* Check the SDRAM controller state */
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if (state == HAL_SDRAM_STATE_BUSY)
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{
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return HAL_BUSY;
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}
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else if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
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{
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/* Process Locked */
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__HAL_LOCK(hsdram);
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/* Update the SDRAM controller state */
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hsdram->State = HAL_SDRAM_STATE_BUSY;
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/* Read data from source */
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for (size = BufferSize; size != 0U; size--)
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{
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*pdestbuff = *(__IO uint8_t *)pSdramAddress;
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pdestbuff++;
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pSdramAddress++;
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}
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/* Update the SDRAM controller state */
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hsdram->State = state;
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/* Process Unlocked */
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__HAL_UNLOCK(hsdram);
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}
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else
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{
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return HAL_ERROR;
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}
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return HAL_OK;
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}
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/**
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* @brief Writes 8-bit data buffer to SDRAM memory.
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* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
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* the configuration information for SDRAM module.
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* @param pAddress Pointer to write start address
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* @param pSrcBuffer Pointer to source buffer to write
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* @param BufferSize Size of the buffer to write to memory
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer,
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uint32_t BufferSize)
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{
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uint32_t size;
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__IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
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uint8_t *psrcbuff = pSrcBuffer;
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/* Check the SDRAM controller state */
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if (hsdram->State == HAL_SDRAM_STATE_BUSY)
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{
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return HAL_BUSY;
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}
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else if (hsdram->State == HAL_SDRAM_STATE_READY)
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{
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/* Process Locked */
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__HAL_LOCK(hsdram);
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/* Update the SDRAM controller state */
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hsdram->State = HAL_SDRAM_STATE_BUSY;
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/* Write data to memory */
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for (size = BufferSize; size != 0U; size--)
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{
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*(__IO uint8_t *)pSdramAddress = *psrcbuff;
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psrcbuff++;
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pSdramAddress++;
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}
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/* Update the SDRAM controller state */
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hsdram->State = HAL_SDRAM_STATE_READY;
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/* Process Unlocked */
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__HAL_UNLOCK(hsdram);
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}
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else
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{
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return HAL_ERROR;
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}
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return HAL_OK;
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}
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/**
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* @brief Reads 16-bit data buffer from the SDRAM memory.
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* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
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* the configuration information for SDRAM module.
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* @param pAddress Pointer to read start address
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* @param pDstBuffer Pointer to destination buffer
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* @param BufferSize Size of the buffer to read from memory
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer,
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uint32_t BufferSize)
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{
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uint32_t size;
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__IO uint32_t *pSdramAddress = pAddress;
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uint16_t *pdestbuff = pDstBuffer;
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HAL_SDRAM_StateTypeDef state = hsdram->State;
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/* Check the SDRAM controller state */
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if (state == HAL_SDRAM_STATE_BUSY)
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{
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return HAL_BUSY;
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}
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else if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
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{
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/* Process Locked */
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__HAL_LOCK(hsdram);
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/* Update the SDRAM controller state */
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hsdram->State = HAL_SDRAM_STATE_BUSY;
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/* Read data from memory */
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for (size = BufferSize; size >= 2U ; size -= 2U)
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{
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*pdestbuff = (uint16_t)((*pSdramAddress) & 0x0000FFFFU);
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pdestbuff++;
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*pdestbuff = (uint16_t)(((*pSdramAddress) & 0xFFFF0000U) >> 16U);
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pdestbuff++;
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pSdramAddress++;
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}
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/* Read last 16-bits if size is not 32-bits multiple */
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if ((BufferSize % 2U) != 0U)
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{
|
|
*pdestbuff = (uint16_t)((*pSdramAddress) & 0x0000FFFFU);
|
|
}
|
|
|
|
/* Update the SDRAM controller state */
|
|
hsdram->State = state;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hsdram);
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Writes 16-bit data buffer to SDRAM memory.
|
|
* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
|
|
* the configuration information for SDRAM module.
|
|
* @param pAddress Pointer to write start address
|
|
* @param pSrcBuffer Pointer to source buffer to write
|
|
* @param BufferSize Size of the buffer to write to memory
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer,
|
|
uint32_t BufferSize)
|
|
{
|
|
uint32_t size;
|
|
__IO uint32_t *psdramaddress = pAddress;
|
|
uint16_t *psrcbuff = pSrcBuffer;
|
|
|
|
/* Check the SDRAM controller state */
|
|
if (hsdram->State == HAL_SDRAM_STATE_BUSY)
|
|
{
|
|
return HAL_BUSY;
|
|
}
|
|
else if (hsdram->State == HAL_SDRAM_STATE_READY)
|
|
{
|
|
/* Process Locked */
|
|
__HAL_LOCK(hsdram);
|
|
|
|
/* Update the SDRAM controller state */
|
|
hsdram->State = HAL_SDRAM_STATE_BUSY;
|
|
|
|
/* Write data to memory */
|
|
for (size = BufferSize; size >= 2U ; size -= 2U)
|
|
{
|
|
*psdramaddress = (uint32_t)(*psrcbuff);
|
|
psrcbuff++;
|
|
*psdramaddress |= ((uint32_t)(*psrcbuff) << 16U);
|
|
psrcbuff++;
|
|
psdramaddress++;
|
|
}
|
|
|
|
/* Write last 16-bits if size is not 32-bits multiple */
|
|
if ((BufferSize % 2U) != 0U)
|
|
{
|
|
*psdramaddress = ((uint32_t)(*psrcbuff) & 0x0000FFFFU) | ((*psdramaddress) & 0xFFFF0000U);
|
|
}
|
|
|
|
/* Update the SDRAM controller state */
|
|
hsdram->State = HAL_SDRAM_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hsdram);
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Reads 32-bit data buffer from the SDRAM memory.
|
|
* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
|
|
* the configuration information for SDRAM module.
|
|
* @param pAddress Pointer to read start address
|
|
* @param pDstBuffer Pointer to destination buffer
|
|
* @param BufferSize Size of the buffer to read from memory
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer,
|
|
uint32_t BufferSize)
|
|
{
|
|
uint32_t size;
|
|
__IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
|
|
uint32_t *pdestbuff = pDstBuffer;
|
|
HAL_SDRAM_StateTypeDef state = hsdram->State;
|
|
|
|
/* Check the SDRAM controller state */
|
|
if (state == HAL_SDRAM_STATE_BUSY)
|
|
{
|
|
return HAL_BUSY;
|
|
}
|
|
else if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
|
|
{
|
|
/* Process Locked */
|
|
__HAL_LOCK(hsdram);
|
|
|
|
/* Update the SDRAM controller state */
|
|
hsdram->State = HAL_SDRAM_STATE_BUSY;
|
|
|
|
/* Read data from source */
|
|
for (size = BufferSize; size != 0U; size--)
|
|
{
|
|
*pdestbuff = *(__IO uint32_t *)pSdramAddress;
|
|
pdestbuff++;
|
|
pSdramAddress++;
|
|
}
|
|
|
|
/* Update the SDRAM controller state */
|
|
hsdram->State = state;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hsdram);
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Writes 32-bit data buffer to SDRAM memory.
|
|
* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
|
|
* the configuration information for SDRAM module.
|
|
* @param pAddress Pointer to write start address
|
|
* @param pSrcBuffer Pointer to source buffer to write
|
|
* @param BufferSize Size of the buffer to write to memory
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer,
|
|
uint32_t BufferSize)
|
|
{
|
|
uint32_t size;
|
|
__IO uint32_t *pSdramAddress = pAddress;
|
|
uint32_t *psrcbuff = pSrcBuffer;
|
|
|
|
/* Check the SDRAM controller state */
|
|
if (hsdram->State == HAL_SDRAM_STATE_BUSY)
|
|
{
|
|
return HAL_BUSY;
|
|
}
|
|
else if (hsdram->State == HAL_SDRAM_STATE_READY)
|
|
{
|
|
/* Process Locked */
|
|
__HAL_LOCK(hsdram);
|
|
|
|
/* Update the SDRAM controller state */
|
|
hsdram->State = HAL_SDRAM_STATE_BUSY;
|
|
|
|
/* Write data to memory */
|
|
for (size = BufferSize; size != 0U; size--)
|
|
{
|
|
*pSdramAddress = *psrcbuff;
|
|
psrcbuff++;
|
|
pSdramAddress++;
|
|
}
|
|
|
|
/* Update the SDRAM controller state */
|
|
hsdram->State = HAL_SDRAM_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hsdram);
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Reads a Words data from the SDRAM memory using DMA transfer.
|
|
* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
|
|
* the configuration information for SDRAM module.
|
|
* @param pAddress Pointer to read start address
|
|
* @param pDstBuffer Pointer to destination buffer
|
|
* @param BufferSize Size of the buffer to read from memory
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer,
|
|
uint32_t BufferSize)
|
|
{
|
|
HAL_StatusTypeDef status;
|
|
HAL_SDRAM_StateTypeDef state = hsdram->State;
|
|
|
|
/* Check the SDRAM controller state */
|
|
if (state == HAL_SDRAM_STATE_BUSY)
|
|
{
|
|
status = HAL_BUSY;
|
|
}
|
|
else if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
|
|
{
|
|
/* Process Locked */
|
|
__HAL_LOCK(hsdram);
|
|
|
|
/* Update the SDRAM controller state */
|
|
hsdram->State = HAL_SDRAM_STATE_BUSY;
|
|
|
|
/* Configure DMA user callbacks */
|
|
if (state == HAL_SDRAM_STATE_READY)
|
|
{
|
|
hsdram->hdma->XferCpltCallback = SDRAM_DMACplt;
|
|
}
|
|
else
|
|
{
|
|
hsdram->hdma->XferCpltCallback = SDRAM_DMACpltProt;
|
|
}
|
|
hsdram->hdma->XferErrorCallback = SDRAM_DMAError;
|
|
|
|
/* Enable the DMA Stream */
|
|
status = HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hsdram);
|
|
}
|
|
else
|
|
{
|
|
status = HAL_ERROR;
|
|
}
|
|
|
|
return status;
|
|
}
|
|
|
|
/**
|
|
* @brief Writes a Words data buffer to SDRAM memory using DMA transfer.
|
|
* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
|
|
* the configuration information for SDRAM module.
|
|
* @param pAddress Pointer to write start address
|
|
* @param pSrcBuffer Pointer to source buffer to write
|
|
* @param BufferSize Size of the buffer to write to memory
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer,
|
|
uint32_t BufferSize)
|
|
{
|
|
HAL_StatusTypeDef status;
|
|
|
|
/* Check the SDRAM controller state */
|
|
if (hsdram->State == HAL_SDRAM_STATE_BUSY)
|
|
{
|
|
status = HAL_BUSY;
|
|
}
|
|
else if (hsdram->State == HAL_SDRAM_STATE_READY)
|
|
{
|
|
/* Process Locked */
|
|
__HAL_LOCK(hsdram);
|
|
|
|
/* Update the SDRAM controller state */
|
|
hsdram->State = HAL_SDRAM_STATE_BUSY;
|
|
|
|
/* Configure DMA user callbacks */
|
|
hsdram->hdma->XferCpltCallback = SDRAM_DMACplt;
|
|
hsdram->hdma->XferErrorCallback = SDRAM_DMAError;
|
|
|
|
/* Enable the DMA Stream */
|
|
status = HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hsdram);
|
|
}
|
|
else
|
|
{
|
|
status = HAL_ERROR;
|
|
}
|
|
|
|
return status;
|
|
}
|
|
|
|
#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
|
|
/**
|
|
* @brief Register a User SDRAM Callback
|
|
* To be used instead of the weak (surcharged) predefined callback
|
|
* @param hsdram : SDRAM handle
|
|
* @param CallbackId : ID of the callback to be registered
|
|
* This parameter can be one of the following values:
|
|
* @arg @ref HAL_SDRAM_MSP_INIT_CB_ID SDRAM MspInit callback ID
|
|
* @arg @ref HAL_SDRAM_MSP_DEINIT_CB_ID SDRAM MspDeInit callback ID
|
|
* @arg @ref HAL_SDRAM_REFRESH_ERR_CB_ID SDRAM Refresh Error callback ID
|
|
* @param pCallback : pointer to the Callback function
|
|
* @retval status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SDRAM_RegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId,
|
|
pSDRAM_CallbackTypeDef pCallback)
|
|
{
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
HAL_SDRAM_StateTypeDef state;
|
|
|
|
if (pCallback == NULL)
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hsdram);
|
|
|
|
state = hsdram->State;
|
|
if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
|
|
{
|
|
switch (CallbackId)
|
|
{
|
|
case HAL_SDRAM_MSP_INIT_CB_ID :
|
|
hsdram->MspInitCallback = pCallback;
|
|
break;
|
|
case HAL_SDRAM_MSP_DEINIT_CB_ID :
|
|
hsdram->MspDeInitCallback = pCallback;
|
|
break;
|
|
case HAL_SDRAM_REFRESH_ERR_CB_ID :
|
|
hsdram->RefreshErrorCallback = pCallback;
|
|
break;
|
|
default :
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
break;
|
|
}
|
|
}
|
|
else if (hsdram->State == HAL_SDRAM_STATE_RESET)
|
|
{
|
|
switch (CallbackId)
|
|
{
|
|
case HAL_SDRAM_MSP_INIT_CB_ID :
|
|
hsdram->MspInitCallback = pCallback;
|
|
break;
|
|
case HAL_SDRAM_MSP_DEINIT_CB_ID :
|
|
hsdram->MspDeInitCallback = pCallback;
|
|
break;
|
|
default :
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
}
|
|
|
|
/* Release Lock */
|
|
__HAL_UNLOCK(hsdram);
|
|
return status;
|
|
}
|
|
|
|
/**
|
|
* @brief Unregister a User SDRAM Callback
|
|
* SDRAM Callback is redirected to the weak (surcharged) predefined callback
|
|
* @param hsdram : SDRAM handle
|
|
* @param CallbackId : ID of the callback to be unregistered
|
|
* This parameter can be one of the following values:
|
|
* @arg @ref HAL_SDRAM_MSP_INIT_CB_ID SDRAM MspInit callback ID
|
|
* @arg @ref HAL_SDRAM_MSP_DEINIT_CB_ID SDRAM MspDeInit callback ID
|
|
* @arg @ref HAL_SDRAM_REFRESH_ERR_CB_ID SDRAM Refresh Error callback ID
|
|
* @arg @ref HAL_SDRAM_DMA_XFER_CPLT_CB_ID SDRAM DMA Xfer Complete callback ID
|
|
* @arg @ref HAL_SDRAM_DMA_XFER_ERR_CB_ID SDRAM DMA Xfer Error callback ID
|
|
* @retval status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId)
|
|
{
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
HAL_SDRAM_StateTypeDef state;
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hsdram);
|
|
|
|
state = hsdram->State;
|
|
if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
|
|
{
|
|
switch (CallbackId)
|
|
{
|
|
case HAL_SDRAM_MSP_INIT_CB_ID :
|
|
hsdram->MspInitCallback = HAL_SDRAM_MspInit;
|
|
break;
|
|
case HAL_SDRAM_MSP_DEINIT_CB_ID :
|
|
hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
|
|
break;
|
|
case HAL_SDRAM_REFRESH_ERR_CB_ID :
|
|
hsdram->RefreshErrorCallback = HAL_SDRAM_RefreshErrorCallback;
|
|
break;
|
|
case HAL_SDRAM_DMA_XFER_CPLT_CB_ID :
|
|
hsdram->DmaXferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
|
|
break;
|
|
case HAL_SDRAM_DMA_XFER_ERR_CB_ID :
|
|
hsdram->DmaXferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
|
|
break;
|
|
default :
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
break;
|
|
}
|
|
}
|
|
else if (hsdram->State == HAL_SDRAM_STATE_RESET)
|
|
{
|
|
switch (CallbackId)
|
|
{
|
|
case HAL_SDRAM_MSP_INIT_CB_ID :
|
|
hsdram->MspInitCallback = HAL_SDRAM_MspInit;
|
|
break;
|
|
case HAL_SDRAM_MSP_DEINIT_CB_ID :
|
|
hsdram->MspDeInitCallback = HAL_SDRAM_MspDeInit;
|
|
break;
|
|
default :
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
}
|
|
|
|
/* Release Lock */
|
|
__HAL_UNLOCK(hsdram);
|
|
return status;
|
|
}
|
|
|
|
/**
|
|
* @brief Register a User SDRAM Callback for DMA transfers
|
|
* To be used instead of the weak (surcharged) predefined callback
|
|
* @param hsdram : SDRAM handle
|
|
* @param CallbackId : ID of the callback to be registered
|
|
* This parameter can be one of the following values:
|
|
* @arg @ref HAL_SDRAM_DMA_XFER_CPLT_CB_ID SDRAM DMA Xfer Complete callback ID
|
|
* @arg @ref HAL_SDRAM_DMA_XFER_ERR_CB_ID SDRAM DMA Xfer Error callback ID
|
|
* @param pCallback : pointer to the Callback function
|
|
* @retval status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId,
|
|
pSDRAM_DmaCallbackTypeDef pCallback)
|
|
{
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
HAL_SDRAM_StateTypeDef state;
|
|
|
|
if (pCallback == NULL)
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hsdram);
|
|
|
|
state = hsdram->State;
|
|
if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_WRITE_PROTECTED))
|
|
{
|
|
switch (CallbackId)
|
|
{
|
|
case HAL_SDRAM_DMA_XFER_CPLT_CB_ID :
|
|
hsdram->DmaXferCpltCallback = pCallback;
|
|
break;
|
|
case HAL_SDRAM_DMA_XFER_ERR_CB_ID :
|
|
hsdram->DmaXferErrorCallback = pCallback;
|
|
break;
|
|
default :
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
}
|
|
|
|
/* Release Lock */
|
|
__HAL_UNLOCK(hsdram);
|
|
return status;
|
|
}
|
|
#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup SDRAM_Exported_Functions_Group3 Control functions
|
|
* @brief management functions
|
|
*
|
|
@verbatim
|
|
==============================================================================
|
|
##### SDRAM Control functions #####
|
|
==============================================================================
|
|
[..]
|
|
This subsection provides a set of functions allowing to control dynamically
|
|
the SDRAM interface.
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Enables dynamically SDRAM write protection.
|
|
* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
|
|
* the configuration information for SDRAM module.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram)
|
|
{
|
|
/* Check the SDRAM controller state */
|
|
if (hsdram->State == HAL_SDRAM_STATE_BUSY)
|
|
{
|
|
return HAL_BUSY;
|
|
}
|
|
else if (hsdram->State == HAL_SDRAM_STATE_READY)
|
|
{
|
|
/* Update the SDRAM state */
|
|
hsdram->State = HAL_SDRAM_STATE_BUSY;
|
|
|
|
/* Enable write protection */
|
|
(void)FMC_SDRAM_WriteProtection_Enable(hsdram->Instance, hsdram->Init.SDBank);
|
|
|
|
/* Update the SDRAM state */
|
|
hsdram->State = HAL_SDRAM_STATE_WRITE_PROTECTED;
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Disables dynamically SDRAM write protection.
|
|
* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
|
|
* the configuration information for SDRAM module.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram)
|
|
{
|
|
HAL_SDRAM_StateTypeDef state = hsdram->State;
|
|
|
|
/* Check the SDRAM controller state */
|
|
if (state == HAL_SDRAM_STATE_BUSY)
|
|
{
|
|
return HAL_BUSY;
|
|
}
|
|
else if (state == HAL_SDRAM_STATE_WRITE_PROTECTED)
|
|
{
|
|
/* Update the SDRAM state */
|
|
hsdram->State = HAL_SDRAM_STATE_BUSY;
|
|
|
|
/* Disable write protection */
|
|
(void)FMC_SDRAM_WriteProtection_Disable(hsdram->Instance, hsdram->Init.SDBank);
|
|
|
|
/* Update the SDRAM state */
|
|
hsdram->State = HAL_SDRAM_STATE_READY;
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Sends Command to the SDRAM bank.
|
|
* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
|
|
* the configuration information for SDRAM module.
|
|
* @param Command SDRAM command structure
|
|
* @param Timeout Timeout duration
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command,
|
|
uint32_t Timeout)
|
|
{
|
|
HAL_SDRAM_StateTypeDef state = hsdram->State;
|
|
|
|
/* Check the SDRAM controller state */
|
|
if (state == HAL_SDRAM_STATE_BUSY)
|
|
{
|
|
return HAL_BUSY;
|
|
}
|
|
else if ((state == HAL_SDRAM_STATE_READY) || (state == HAL_SDRAM_STATE_PRECHARGED))
|
|
{
|
|
/* Update the SDRAM state */
|
|
hsdram->State = HAL_SDRAM_STATE_BUSY;
|
|
|
|
/* Send SDRAM command */
|
|
(void)FMC_SDRAM_SendCommand(hsdram->Instance, Command, Timeout);
|
|
|
|
/* Update the SDRAM controller state state */
|
|
if (Command->CommandMode == FMC_SDRAM_CMD_PALL)
|
|
{
|
|
hsdram->State = HAL_SDRAM_STATE_PRECHARGED;
|
|
}
|
|
else
|
|
{
|
|
hsdram->State = HAL_SDRAM_STATE_READY;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Programs the SDRAM Memory Refresh rate.
|
|
* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
|
|
* the configuration information for SDRAM module.
|
|
* @param RefreshRate The SDRAM refresh rate value
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate)
|
|
{
|
|
/* Check the SDRAM controller state */
|
|
if (hsdram->State == HAL_SDRAM_STATE_BUSY)
|
|
{
|
|
return HAL_BUSY;
|
|
}
|
|
else if (hsdram->State == HAL_SDRAM_STATE_READY)
|
|
{
|
|
/* Update the SDRAM state */
|
|
hsdram->State = HAL_SDRAM_STATE_BUSY;
|
|
|
|
/* Program the refresh rate */
|
|
(void)FMC_SDRAM_ProgramRefreshRate(hsdram->Instance, RefreshRate);
|
|
|
|
/* Update the SDRAM state */
|
|
hsdram->State = HAL_SDRAM_STATE_READY;
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Sets the Number of consecutive SDRAM Memory auto Refresh commands.
|
|
* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
|
|
* the configuration information for SDRAM module.
|
|
* @param AutoRefreshNumber The SDRAM auto Refresh number
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber)
|
|
{
|
|
/* Check the SDRAM controller state */
|
|
if (hsdram->State == HAL_SDRAM_STATE_BUSY)
|
|
{
|
|
return HAL_BUSY;
|
|
}
|
|
else if (hsdram->State == HAL_SDRAM_STATE_READY)
|
|
{
|
|
/* Update the SDRAM state */
|
|
hsdram->State = HAL_SDRAM_STATE_BUSY;
|
|
|
|
/* Set the Auto-Refresh number */
|
|
(void)FMC_SDRAM_SetAutoRefreshNumber(hsdram->Instance, AutoRefreshNumber);
|
|
|
|
/* Update the SDRAM state */
|
|
hsdram->State = HAL_SDRAM_STATE_READY;
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Returns the SDRAM memory current mode.
|
|
* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
|
|
* the configuration information for SDRAM module.
|
|
* @retval The SDRAM memory mode.
|
|
*/
|
|
uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram)
|
|
{
|
|
/* Return the SDRAM memory current mode */
|
|
return (FMC_SDRAM_GetModeStatus(hsdram->Instance, hsdram->Init.SDBank));
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup SDRAM_Exported_Functions_Group4 State functions
|
|
* @brief Peripheral State functions
|
|
*
|
|
@verbatim
|
|
==============================================================================
|
|
##### SDRAM State functions #####
|
|
==============================================================================
|
|
[..]
|
|
This subsection permits to get in run-time the status of the SDRAM controller
|
|
and the data flow.
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Returns the SDRAM state.
|
|
* @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
|
|
* the configuration information for SDRAM module.
|
|
* @retval HAL state
|
|
*/
|
|
HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram)
|
|
{
|
|
return hsdram->State;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @brief DMA SDRAM process complete callback.
|
|
* @param hdma : DMA handle
|
|
* @retval None
|
|
*/
|
|
static void SDRAM_DMACplt(DMA_HandleTypeDef *hdma)
|
|
{
|
|
SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hdma->Parent);
|
|
|
|
/* Disable the DMA channel */
|
|
__HAL_DMA_DISABLE(hdma);
|
|
|
|
/* Update the SDRAM controller state */
|
|
hsdram->State = HAL_SDRAM_STATE_READY;
|
|
|
|
#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
|
|
hsdram->DmaXferCpltCallback(hdma);
|
|
#else
|
|
HAL_SDRAM_DMA_XferCpltCallback(hdma);
|
|
#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
/**
|
|
* @brief DMA SRAM process complete callback.
|
|
* @param hdma : DMA handle
|
|
* @retval None
|
|
*/
|
|
static void SDRAM_DMACpltProt(DMA_HandleTypeDef *hdma)
|
|
{
|
|
SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hdma->Parent);
|
|
|
|
/* Disable the DMA channel */
|
|
__HAL_DMA_DISABLE(hdma);
|
|
|
|
/* Update the SDRAM controller state */
|
|
hsdram->State = HAL_SDRAM_STATE_WRITE_PROTECTED;
|
|
|
|
#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
|
|
hsdram->DmaXferCpltCallback(hdma);
|
|
#else
|
|
HAL_SDRAM_DMA_XferCpltCallback(hdma);
|
|
#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
/**
|
|
* @brief DMA SDRAM error callback.
|
|
* @param hdma : DMA handle
|
|
* @retval None
|
|
*/
|
|
static void SDRAM_DMAError(DMA_HandleTypeDef *hdma)
|
|
{
|
|
SDRAM_HandleTypeDef *hsdram = (SDRAM_HandleTypeDef *)(hdma->Parent);
|
|
|
|
/* Disable the DMA channel */
|
|
__HAL_DMA_DISABLE(hdma);
|
|
|
|
/* Update the SDRAM controller state */
|
|
hsdram->State = HAL_SDRAM_STATE_ERROR;
|
|
|
|
#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
|
|
hsdram->DmaXferErrorCallback(hdma);
|
|
#else
|
|
HAL_SDRAM_DMA_XferErrorCallback(hdma);
|
|
#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|