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Julien Chevalley
345
Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c
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345
Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c
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/* ----------------------------------------------------------------------
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* Project: CMSIS DSP Library
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* Title: arm_cfft_q15.c
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* Description: Combined Radix Decimation in Q15 Frequency CFFT processing function
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*
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* $Date: 27. January 2017
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* $Revision: V.1.5.1
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*
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* Target Processor: Cortex-M cores
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* -------------------------------------------------------------------- */
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/*
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* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "arm_math.h"
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extern void arm_radix4_butterfly_q15(
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q15_t * pSrc,
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uint32_t fftLen,
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q15_t * pCoef,
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uint32_t twidCoefModifier);
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extern void arm_radix4_butterfly_inverse_q15(
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q15_t * pSrc,
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uint32_t fftLen,
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q15_t * pCoef,
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uint32_t twidCoefModifier);
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extern void arm_bitreversal_16(
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uint16_t * pSrc,
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const uint16_t bitRevLen,
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const uint16_t * pBitRevTable);
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void arm_cfft_radix4by2_q15(
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q15_t * pSrc,
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uint32_t fftLen,
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const q15_t * pCoef);
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void arm_cfft_radix4by2_inverse_q15(
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q15_t * pSrc,
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uint32_t fftLen,
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const q15_t * pCoef);
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/**
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* @ingroup groupTransforms
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*/
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/**
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* @addtogroup ComplexFFT
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* @{
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*/
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/**
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* @details
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* @brief Processing function for the Q15 complex FFT.
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* @param[in] *S points to an instance of the Q15 CFFT structure.
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* @param[in, out] *p1 points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
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* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
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* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
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* @return none.
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*/
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void arm_cfft_q15(
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const arm_cfft_instance_q15 * S,
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q15_t * p1,
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uint8_t ifftFlag,
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uint8_t bitReverseFlag)
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{
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uint32_t L = S->fftLen;
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if (ifftFlag == 1U)
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{
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switch (L)
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{
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case 16:
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case 64:
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case 256:
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case 1024:
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case 4096:
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arm_radix4_butterfly_inverse_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 );
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break;
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case 32:
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case 128:
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case 512:
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case 2048:
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arm_cfft_radix4by2_inverse_q15 ( p1, L, S->pTwiddle );
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break;
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}
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}
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else
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{
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switch (L)
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{
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case 16:
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case 64:
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case 256:
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case 1024:
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case 4096:
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arm_radix4_butterfly_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 );
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break;
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case 32:
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case 128:
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case 512:
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case 2048:
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arm_cfft_radix4by2_q15 ( p1, L, S->pTwiddle );
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break;
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}
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}
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if ( bitReverseFlag )
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arm_bitreversal_16((uint16_t*)p1,S->bitRevLength,S->pBitRevTable);
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}
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/**
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* @} end of ComplexFFT group
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*/
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void arm_cfft_radix4by2_q15(
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q15_t * pSrc,
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uint32_t fftLen,
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const q15_t * pCoef)
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{
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uint32_t i;
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uint32_t n2;
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q15_t p0, p1, p2, p3;
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#if defined (ARM_MATH_DSP)
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q31_t T, S, R;
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q31_t coeff, out1, out2;
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const q15_t *pC = pCoef;
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q15_t *pSi = pSrc;
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q15_t *pSl = pSrc + fftLen;
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#else
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uint32_t ia, l;
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q15_t xt, yt, cosVal, sinVal;
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#endif
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n2 = fftLen >> 1;
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#if defined (ARM_MATH_DSP)
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for (i = n2; i > 0; i--)
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{
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coeff = _SIMD32_OFFSET(pC);
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pC += 2;
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T = _SIMD32_OFFSET(pSi);
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T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
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S = _SIMD32_OFFSET(pSl);
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S = __SHADD16(S, 0); // this is just a SIMD arithmetic shift right by 1
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R = __QSUB16(T, S);
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_SIMD32_OFFSET(pSi) = __SHADD16(T, S);
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pSi += 2;
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#ifndef ARM_MATH_BIG_ENDIAN
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out1 = __SMUAD(coeff, R) >> 16;
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out2 = __SMUSDX(coeff, R);
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#else
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out1 = __SMUSDX(R, coeff) >> 16U;
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out2 = __SMUAD(coeff, R);
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#endif // #ifndef ARM_MATH_BIG_ENDIAN
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_SIMD32_OFFSET(pSl) =
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(q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
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pSl += 2;
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}
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#else // #if defined (ARM_MATH_DSP)
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ia = 0;
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for (i = 0; i < n2; i++)
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{
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cosVal = pCoef[ia * 2];
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sinVal = pCoef[(ia * 2) + 1];
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ia++;
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l = i + n2;
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xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
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pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
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yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
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pSrc[2 * i + 1] =
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((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
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pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
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((int16_t) (((q31_t) yt * sinVal) >> 16)));
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pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
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((int16_t) (((q31_t) xt * sinVal) >> 16)));
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}
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#endif // #if defined (ARM_MATH_DSP)
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// first col
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arm_radix4_butterfly_q15( pSrc, n2, (q15_t*)pCoef, 2U);
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// second col
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arm_radix4_butterfly_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
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for (i = 0; i < fftLen >> 1; i++)
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{
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p0 = pSrc[4*i+0];
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p1 = pSrc[4*i+1];
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p2 = pSrc[4*i+2];
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p3 = pSrc[4*i+3];
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p0 <<= 1;
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p1 <<= 1;
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p2 <<= 1;
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p3 <<= 1;
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pSrc[4*i+0] = p0;
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pSrc[4*i+1] = p1;
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pSrc[4*i+2] = p2;
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pSrc[4*i+3] = p3;
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}
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}
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void arm_cfft_radix4by2_inverse_q15(
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q15_t * pSrc,
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uint32_t fftLen,
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const q15_t * pCoef)
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{
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uint32_t i;
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uint32_t n2;
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q15_t p0, p1, p2, p3;
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#if defined (ARM_MATH_DSP)
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q31_t T, S, R;
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q31_t coeff, out1, out2;
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const q15_t *pC = pCoef;
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q15_t *pSi = pSrc;
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q15_t *pSl = pSrc + fftLen;
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#else
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uint32_t ia, l;
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q15_t xt, yt, cosVal, sinVal;
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#endif
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n2 = fftLen >> 1;
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#if defined (ARM_MATH_DSP)
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for (i = n2; i > 0; i--)
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{
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coeff = _SIMD32_OFFSET(pC);
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pC += 2;
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T = _SIMD32_OFFSET(pSi);
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T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
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S = _SIMD32_OFFSET(pSl);
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S = __SHADD16(S, 0); // this is just a SIMD arithmetic shift right by 1
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R = __QSUB16(T, S);
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_SIMD32_OFFSET(pSi) = __SHADD16(T, S);
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pSi += 2;
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#ifndef ARM_MATH_BIG_ENDIAN
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out1 = __SMUSD(coeff, R) >> 16;
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out2 = __SMUADX(coeff, R);
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#else
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out1 = __SMUADX(R, coeff) >> 16U;
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out2 = __SMUSD(__QSUB(0, coeff), R);
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#endif // #ifndef ARM_MATH_BIG_ENDIAN
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_SIMD32_OFFSET(pSl) =
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(q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
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pSl += 2;
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}
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#else // #if defined (ARM_MATH_DSP)
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ia = 0;
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for (i = 0; i < n2; i++)
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{
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cosVal = pCoef[ia * 2];
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sinVal = pCoef[(ia * 2) + 1];
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ia++;
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l = i + n2;
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xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
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pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
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yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
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pSrc[2 * i + 1] =
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((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
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pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
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((int16_t) (((q31_t) yt * sinVal) >> 16)));
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pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
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((int16_t) (((q31_t) xt * sinVal) >> 16)));
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}
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#endif // #if defined (ARM_MATH_DSP)
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// first col
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arm_radix4_butterfly_inverse_q15( pSrc, n2, (q15_t*)pCoef, 2U);
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// second col
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arm_radix4_butterfly_inverse_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
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for (i = 0; i < fftLen >> 1; i++)
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{
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p0 = pSrc[4*i+0];
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p1 = pSrc[4*i+1];
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p2 = pSrc[4*i+2];
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p3 = pSrc[4*i+3];
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p0 <<= 1;
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p1 <<= 1;
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p2 <<= 1;
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p3 <<= 1;
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pSrc[4*i+0] = p0;
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pSrc[4*i+1] = p1;
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pSrc[4*i+2] = p2;
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pSrc[4*i+3] = p3;
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}
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}
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