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| /** | ||||
|   ****************************************************************************** | ||||
|   * @file    system_stm32f7xx.c | ||||
|   * @author  MCD Application Team | ||||
|   * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer System Source File. | ||||
|   * | ||||
|   *   This file provides two functions and one global variable to be called from  | ||||
|   *   user application: | ||||
|   *      - SystemInit(): This function is called at startup just after reset and  | ||||
|   *                      before branch to main program. This call is made inside | ||||
|   *                      the "startup_stm32f7xx.s" file. | ||||
|   * | ||||
|   *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used | ||||
|   *                                  by the user application to setup the SysTick  | ||||
|   *                                  timer or configure other parameters. | ||||
|   *                                      | ||||
|   *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must | ||||
|   *                                 be called whenever the core clock is changed | ||||
|   *                                 during program execution. | ||||
|   * | ||||
|   * | ||||
|   ****************************************************************************** | ||||
|   * @attention | ||||
|   * | ||||
|   * Copyright (c) 2016 STMicroelectronics. | ||||
|   * All rights reserved. | ||||
|   * | ||||
|   * This software is licensed under terms that can be found in the LICENSE file | ||||
|   * in the root directory of this software component. | ||||
|   * If no LICENSE file comes with this software, it is provided AS-IS. | ||||
|   * | ||||
|   ****************************************************************************** | ||||
|   */ | ||||
|  | ||||
| /** @addtogroup CMSIS | ||||
|   * @{ | ||||
|   */ | ||||
|  | ||||
| /** @addtogroup stm32f7xx_system | ||||
|   * @{ | ||||
|   */   | ||||
|    | ||||
| /** @addtogroup STM32F7xx_System_Private_Includes | ||||
|   * @{ | ||||
|   */ | ||||
|  | ||||
| #include "stm32f7xx.h" | ||||
|  | ||||
| #if !defined  (HSE_VALUE)  | ||||
|   #define HSE_VALUE    ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */ | ||||
| #endif /* HSE_VALUE */ | ||||
|  | ||||
| #if !defined  (HSI_VALUE) | ||||
|   #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ | ||||
| #endif /* HSI_VALUE */ | ||||
|  | ||||
| /** | ||||
|   * @} | ||||
|   */ | ||||
|  | ||||
| /** @addtogroup STM32F7xx_System_Private_TypesDefinitions | ||||
|   * @{ | ||||
|   */ | ||||
|  | ||||
| /** | ||||
|   * @} | ||||
|   */ | ||||
|  | ||||
| /** @addtogroup STM32F7xx_System_Private_Defines | ||||
|   * @{ | ||||
|   */ | ||||
|  | ||||
| /************************* Miscellaneous Configuration ************************/ | ||||
|  | ||||
| /* Note: Following vector table addresses must be defined in line with linker | ||||
|          configuration. */ | ||||
| /*!< Uncomment the following line if you need to relocate the vector table | ||||
|      anywhere in Flash or Sram, else the vector table is kept at the automatic | ||||
|      remap of boot address selected */ | ||||
| /* #define USER_VECT_TAB_ADDRESS */ | ||||
|  | ||||
| #if defined(USER_VECT_TAB_ADDRESS) | ||||
| /*!< Uncomment the following line if you need to relocate your vector Table | ||||
|      in Sram else user remap will be done in Flash. */ | ||||
| /* #define VECT_TAB_SRAM */ | ||||
| #if defined(VECT_TAB_SRAM) | ||||
| #define VECT_TAB_BASE_ADDRESS   RAMDTCM_BASE    /*!< Vector Table base address field. | ||||
|                                                      This value must be a multiple of 0x200. */ | ||||
| #define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field. | ||||
|                                                      This value must be a multiple of 0x200. */ | ||||
| #else | ||||
| #define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field. | ||||
|                                                      This value must be a multiple of 0x200. */ | ||||
| #define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field. | ||||
|                                                      This value must be a multiple of 0x200. */ | ||||
| #endif /* VECT_TAB_SRAM */ | ||||
| #endif /* USER_VECT_TAB_ADDRESS */ | ||||
| /******************************************************************************/ | ||||
|  | ||||
| /** | ||||
|   * @} | ||||
|   */ | ||||
|  | ||||
| /** @addtogroup STM32F7xx_System_Private_Macros | ||||
|   * @{ | ||||
|   */ | ||||
|  | ||||
| /** | ||||
|   * @} | ||||
|   */ | ||||
|  | ||||
| /** @addtogroup STM32F7xx_System_Private_Variables | ||||
|   * @{ | ||||
|   */ | ||||
|  | ||||
|   /* This variable is updated in three ways: | ||||
|       1) by calling CMSIS function SystemCoreClockUpdate() | ||||
|       2) by calling HAL API function HAL_RCC_GetHCLKFreq() | ||||
|       3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency  | ||||
|          Note: If you use this function to configure the system clock; then there | ||||
|                is no need to call the 2 first functions listed above, since SystemCoreClock | ||||
|                variable is updated automatically. | ||||
|   */ | ||||
|   uint32_t SystemCoreClock = 16000000; | ||||
|   const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; | ||||
|   const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; | ||||
|  | ||||
| /** | ||||
|   * @} | ||||
|   */ | ||||
|  | ||||
| /** @addtogroup STM32F7xx_System_Private_FunctionPrototypes | ||||
|   * @{ | ||||
|   */ | ||||
|  | ||||
| /** | ||||
|   * @} | ||||
|   */ | ||||
|  | ||||
| /** @addtogroup STM32F7xx_System_Private_Functions | ||||
|   * @{ | ||||
|   */ | ||||
|  | ||||
| /** | ||||
|   * @brief  Setup the microcontroller system | ||||
|   *         Initialize the Embedded Flash Interface, the PLL and update the  | ||||
|   *         SystemFrequency variable. | ||||
|   * @param  None | ||||
|   * @retval None | ||||
|   */ | ||||
| void SystemInit(void) | ||||
| { | ||||
|   /* FPU settings ------------------------------------------------------------*/ | ||||
| #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) | ||||
|   SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */ | ||||
| #endif | ||||
|  | ||||
|   /* Configure the Vector Table location -------------------------------------*/ | ||||
| #if defined(USER_VECT_TAB_ADDRESS) | ||||
|   SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ | ||||
| #endif /* USER_VECT_TAB_ADDRESS */ | ||||
| } | ||||
|  | ||||
| /** | ||||
|    * @brief  Update SystemCoreClock variable according to Clock Register Values. | ||||
|   *         The SystemCoreClock variable contains the core clock (HCLK), it can | ||||
|   *         be used by the user application to setup the SysTick timer or configure | ||||
|   *         other parameters. | ||||
|   *            | ||||
|   * @note   Each time the core clock (HCLK) changes, this function must be called | ||||
|   *         to update SystemCoreClock variable value. Otherwise, any configuration | ||||
|   *         based on this variable will be incorrect.          | ||||
|   *      | ||||
|   * @note   - The system frequency computed by this function is not the real  | ||||
|   *           frequency in the chip. It is calculated based on the predefined  | ||||
|   *           constant and the selected clock source: | ||||
|   *              | ||||
|   *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) | ||||
|   *                                               | ||||
|   *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) | ||||
|   *                           | ||||
|   *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)  | ||||
|   *             or HSI_VALUE(*) multiplied/divided by the PLL factors. | ||||
|   *          | ||||
|   *         (*) HSI_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value | ||||
|   *             16 MHz) but the real value may vary depending on the variations | ||||
|   *             in voltage and temperature.    | ||||
|   *     | ||||
|   *         (**) HSE_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value | ||||
|   *              25 MHz), user has to ensure that HSE_VALUE is same as the real | ||||
|   *              frequency of the crystal used. Otherwise, this function may | ||||
|   *              have wrong result. | ||||
|   *                 | ||||
|   *         - The result of this function could be not correct when using fractional | ||||
|   *           value for HSE crystal. | ||||
|   *      | ||||
|   * @param  None | ||||
|   * @retval None | ||||
|   */ | ||||
| void SystemCoreClockUpdate(void) | ||||
| { | ||||
|   uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; | ||||
|    | ||||
|   /* Get SYSCLK source -------------------------------------------------------*/ | ||||
|   tmp = RCC->CFGR & RCC_CFGR_SWS; | ||||
|  | ||||
|   switch (tmp) | ||||
|   { | ||||
|     case 0x00:  /* HSI used as system clock source */ | ||||
|       SystemCoreClock = HSI_VALUE; | ||||
|       break; | ||||
|     case 0x04:  /* HSE used as system clock source */ | ||||
|       SystemCoreClock = HSE_VALUE; | ||||
|       break; | ||||
|     case 0x08:  /* PLL used as system clock source */ | ||||
|  | ||||
|       /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N | ||||
|          SYSCLK = PLL_VCO / PLL_P | ||||
|          */     | ||||
|       pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; | ||||
|       pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; | ||||
|        | ||||
|       if (pllsource != 0) | ||||
|       { | ||||
|         /* HSE used as PLL clock source */ | ||||
|         pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); | ||||
|       } | ||||
|       else | ||||
|       { | ||||
|         /* HSI used as PLL clock source */ | ||||
|         pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);       | ||||
|       } | ||||
|  | ||||
|       pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; | ||||
|       SystemCoreClock = pllvco/pllp; | ||||
|       break; | ||||
|     default: | ||||
|       SystemCoreClock = HSI_VALUE; | ||||
|       break; | ||||
|   } | ||||
|   /* Compute HCLK frequency --------------------------------------------------*/ | ||||
|   /* Get HCLK prescaler */ | ||||
|   tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; | ||||
|   /* HCLK frequency */ | ||||
|   SystemCoreClock >>= tmp; | ||||
| } | ||||
|  | ||||
| /** | ||||
|   * @} | ||||
|   */ | ||||
|  | ||||
| /** | ||||
|   * @} | ||||
|   */ | ||||
|    | ||||
| /** | ||||
|   * @} | ||||
|   */     | ||||
| /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | ||||
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