2358 lines
29 KiB
Plaintext
2358 lines
29 KiB
Plaintext
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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]
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libraryRefs [
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"ieee"
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]
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)
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version "24.1"
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appVersion "2009.2 (Build 10)"
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model (Symbol
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commonDM (CommonDM
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ldm (LogicalDM
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suid 30,0
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usingSuid 1
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emptyRow *1 (LEmptyRow
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)
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uid 88,0
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optionalChildren [
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*2 (RefLabelRowHdr
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)
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*3 (TitleRowHdr
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)
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*4 (FilterRowHdr
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)
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|
*5 (RefLabelColHdr
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tm "RefLabelColHdrMgr"
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)
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|
*6 (RowExpandColHdr
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tm "RowExpandColHdrMgr"
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)
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*7 (GroupColHdr
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tm "GroupColHdrMgr"
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)
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*8 (NameColHdr
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tm "NameColHdrMgr"
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)
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*9 (ModeColHdr
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tm "ModeColHdrMgr"
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)
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|
*10 (TypeColHdr
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tm "TypeColHdrMgr"
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)
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*11 (BoundsColHdr
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tm "BoundsColHdrMgr"
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)
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|
*12 (InitColHdr
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tm "InitColHdrMgr"
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)
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|
*13 (EolColHdr
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tm "EolColHdrMgr"
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)
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*14 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "aluCode"
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t "std_ulogic_vector"
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b "( aluCodeBitNb-1 DOWNTO 0 )"
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o 4
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suid 2,0
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)
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)
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uid 78,0
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)
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*15 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "portIndexedSel"
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t "std_ulogic"
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o 6
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suid 5,0
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)
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)
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uid 84,0
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)
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*16 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "addrA"
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t "unsigned"
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b "( registerAddressBitNb-1 DOWNTO 0 )"
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o 2
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suid 9,0
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)
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)
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uid 415,0
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)
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*17 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "addrB"
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t "unsigned"
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b "( registerAddressBitNb-1 DOWNTO 0 )"
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o 3
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suid 10,0
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)
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)
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uid 417,0
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)
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*18 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "instrData"
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t "signed"
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b "( registerBitNb-1 DOWNTO 0 )"
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o 8
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suid 11,0
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)
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)
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uid 419,0
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)
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*19 (LogPort
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|
port (LogicalPort
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|
m 1
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|
decl (Decl
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|
n "opCode"
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|
t "std_ulogic_vector"
|
|
b "( opCodeBitNb-1 DOWNTO 0 )"
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o 10
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suid 16,0
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)
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)
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|
uid 459,0
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)
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|
*20 (LogPort
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|
port (LogicalPort
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|
m 1
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decl (Decl
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n "portAddress"
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t "unsigned"
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b "(portAddressBitNb-1 DOWNTO 0)"
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o 11
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suid 18,0
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)
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)
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uid 468,0
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)
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*21 (LogPort
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port (LogicalPort
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decl (Decl
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|
n "instruction"
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t "std_ulogic_vector"
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b "( instructionBitNb-1 DOWNTO 0 )"
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o 1
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suid 19,0
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)
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)
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uid 499,0
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)
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*22 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "instrAddress"
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t "unsigned"
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|
b "( programCounterBitNb-1 DOWNTO 0 )"
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o 7
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suid 24,0
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)
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)
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uid 658,0
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)
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|
*23 (LogPort
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|
port (LogicalPort
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|
m 1
|
|
decl (Decl
|
|
n "branchCond"
|
|
t "std_ulogic_vector"
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|
b "(branchCondBitNb-1 DOWNTO 0)"
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o 5
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suid 25,0
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)
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)
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|
uid 674,0
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)
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|
*24 (LogPort
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port (LogicalPort
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|
m 1
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|
decl (Decl
|
|
n "intCode"
|
|
t "std_ulogic_vector"
|
|
b "( intCodeBitNb-1 DOWNTO 0 )"
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o 9
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suid 26,0
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)
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)
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|
uid 676,0
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)
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|
*25 (LogPort
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port (LogicalPort
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|
m 1
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|
decl (Decl
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|
n "spadAddress"
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t "unsigned"
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|
b "( spadAddressBitNb-1 DOWNTO 0 )"
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o 12
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suid 28,0
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)
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)
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uid 746,0
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)
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|
*26 (LogPort
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port (LogicalPort
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|
m 1
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|
decl (Decl
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|
n "spadIndexedSel"
|
|
t "std_ulogic"
|
|
o 13
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suid 29,0
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)
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)
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|
uid 799,0
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)
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|
*27 (LogPort
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port (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "twoRegInstr"
|
|
t "std_ulogic"
|
|
o 14
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|
suid 30,0
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|
)
|
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)
|
|
uid 900,0
|
|
)
|
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]
|
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)
|
|
pdm (PhysicalDM
|
|
displayShortBounds 1
|
|
editShortBounds 1
|
|
uid 101,0
|
|
optionalChildren [
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|
*28 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
emptyMRCItem *29 (MRCItem
|
|
litem &1
|
|
pos 14
|
|
dimension 20
|
|
)
|
|
uid 103,0
|
|
optionalChildren [
|
|
*30 (MRCItem
|
|
litem &2
|
|
pos 0
|
|
dimension 20
|
|
uid 104,0
|
|
)
|
|
*31 (MRCItem
|
|
litem &3
|
|
pos 1
|
|
dimension 23
|
|
uid 105,0
|
|
)
|
|
*32 (MRCItem
|
|
litem &4
|
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pos 2
|
|
hidden 1
|
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dimension 20
|
|
uid 106,0
|
|
)
|
|
*33 (MRCItem
|
|
litem &14
|
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pos 2
|
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dimension 20
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uid 79,0
|
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)
|
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*34 (MRCItem
|
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litem &15
|
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pos 6
|
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dimension 20
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uid 85,0
|
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)
|
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*35 (MRCItem
|
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litem &16
|
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pos 0
|
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dimension 20
|
|
uid 416,0
|
|
)
|
|
*36 (MRCItem
|
|
litem &17
|
|
pos 1
|
|
dimension 20
|
|
uid 418,0
|
|
)
|
|
*37 (MRCItem
|
|
litem &18
|
|
pos 3
|
|
dimension 20
|
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uid 420,0
|
|
)
|
|
*38 (MRCItem
|
|
litem &19
|
|
pos 5
|
|
dimension 20
|
|
uid 460,0
|
|
)
|
|
*39 (MRCItem
|
|
litem &20
|
|
pos 7
|
|
dimension 20
|
|
uid 469,0
|
|
)
|
|
*40 (MRCItem
|
|
litem &21
|
|
pos 4
|
|
dimension 20
|
|
uid 500,0
|
|
)
|
|
*41 (MRCItem
|
|
litem &22
|
|
pos 8
|
|
dimension 20
|
|
uid 659,0
|
|
)
|
|
*42 (MRCItem
|
|
litem &23
|
|
pos 9
|
|
dimension 20
|
|
uid 675,0
|
|
)
|
|
*43 (MRCItem
|
|
litem &24
|
|
pos 10
|
|
dimension 20
|
|
uid 677,0
|
|
)
|
|
*44 (MRCItem
|
|
litem &25
|
|
pos 11
|
|
dimension 20
|
|
uid 747,0
|
|
)
|
|
*45 (MRCItem
|
|
litem &26
|
|
pos 12
|
|
dimension 20
|
|
uid 800,0
|
|
)
|
|
*46 (MRCItem
|
|
litem &27
|
|
pos 13
|
|
dimension 20
|
|
uid 901,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 107,0
|
|
optionalChildren [
|
|
*47 (MRCItem
|
|
litem &5
|
|
pos 0
|
|
dimension 20
|
|
uid 108,0
|
|
)
|
|
*48 (MRCItem
|
|
litem &7
|
|
pos 1
|
|
dimension 50
|
|
uid 109,0
|
|
)
|
|
*49 (MRCItem
|
|
litem &8
|
|
pos 2
|
|
dimension 100
|
|
uid 110,0
|
|
)
|
|
*50 (MRCItem
|
|
litem &9
|
|
pos 3
|
|
dimension 50
|
|
uid 111,0
|
|
)
|
|
*51 (MRCItem
|
|
litem &10
|
|
pos 4
|
|
dimension 100
|
|
uid 112,0
|
|
)
|
|
*52 (MRCItem
|
|
litem &11
|
|
pos 5
|
|
dimension 100
|
|
uid 113,0
|
|
)
|
|
*53 (MRCItem
|
|
litem &12
|
|
pos 6
|
|
dimension 50
|
|
uid 114,0
|
|
)
|
|
*54 (MRCItem
|
|
litem &13
|
|
pos 7
|
|
dimension 80
|
|
uid 115,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 4
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 102,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 87,0
|
|
)
|
|
genericsCommonDM (CommonDM
|
|
ldm (LogicalDM
|
|
emptyRow *55 (LEmptyRow
|
|
)
|
|
uid 117,0
|
|
optionalChildren [
|
|
*56 (RefLabelRowHdr
|
|
)
|
|
*57 (TitleRowHdr
|
|
)
|
|
*58 (FilterRowHdr
|
|
)
|
|
*59 (RefLabelColHdr
|
|
tm "RefLabelColHdrMgr"
|
|
)
|
|
*60 (RowExpandColHdr
|
|
tm "RowExpandColHdrMgr"
|
|
)
|
|
*61 (GroupColHdr
|
|
tm "GroupColHdrMgr"
|
|
)
|
|
*62 (NameColHdr
|
|
tm "GenericNameColHdrMgr"
|
|
)
|
|
*63 (TypeColHdr
|
|
tm "GenericTypeColHdrMgr"
|
|
)
|
|
*64 (InitColHdr
|
|
tm "GenericValueColHdrMgr"
|
|
)
|
|
*65 (PragmaColHdr
|
|
tm "GenericPragmaColHdrMgr"
|
|
)
|
|
*66 (EolColHdr
|
|
tm "GenericEolColHdrMgr"
|
|
)
|
|
*67 (LogGeneric
|
|
generic (GiElement
|
|
name "registerBitNb"
|
|
type "positive"
|
|
value "8"
|
|
)
|
|
uid 592,0
|
|
)
|
|
*68 (LogGeneric
|
|
generic (GiElement
|
|
name "registerAddressBitNb"
|
|
type "positive"
|
|
value "4"
|
|
)
|
|
uid 594,0
|
|
)
|
|
*69 (LogGeneric
|
|
generic (GiElement
|
|
name "aluCodeBitNb"
|
|
type "positive"
|
|
value "5"
|
|
)
|
|
uid 596,0
|
|
)
|
|
*70 (LogGeneric
|
|
generic (GiElement
|
|
name "instructionBitNb"
|
|
type "positive"
|
|
value "18"
|
|
)
|
|
uid 651,0
|
|
)
|
|
*71 (LogGeneric
|
|
generic (GiElement
|
|
name "programCounterBitNb"
|
|
type "positive"
|
|
value "10"
|
|
)
|
|
uid 660,0
|
|
)
|
|
*72 (LogGeneric
|
|
generic (GiElement
|
|
name "opCodeBitNb"
|
|
type "positive"
|
|
value "5"
|
|
)
|
|
uid 662,0
|
|
)
|
|
*73 (LogGeneric
|
|
generic (GiElement
|
|
name "branchCondBitNb"
|
|
type "positive"
|
|
value "3"
|
|
)
|
|
uid 678,0
|
|
)
|
|
*74 (LogGeneric
|
|
generic (GiElement
|
|
name "intCodeBitNb"
|
|
type "positive"
|
|
value "5"
|
|
)
|
|
uid 680,0
|
|
)
|
|
*75 (LogGeneric
|
|
generic (GiElement
|
|
name "spadAddressBitNb"
|
|
type "natural"
|
|
value "4"
|
|
)
|
|
uid 739,0
|
|
)
|
|
*76 (LogGeneric
|
|
generic (GiElement
|
|
name "portAddressBitNb"
|
|
type "positive"
|
|
value "8"
|
|
)
|
|
uid 824,0
|
|
)
|
|
]
|
|
)
|
|
pdm (PhysicalDM
|
|
displayShortBounds 1
|
|
editShortBounds 1
|
|
uid 129,0
|
|
optionalChildren [
|
|
*77 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
emptyMRCItem *78 (MRCItem
|
|
litem &55
|
|
pos 10
|
|
dimension 20
|
|
)
|
|
uid 131,0
|
|
optionalChildren [
|
|
*79 (MRCItem
|
|
litem &56
|
|
pos 0
|
|
dimension 20
|
|
uid 132,0
|
|
)
|
|
*80 (MRCItem
|
|
litem &57
|
|
pos 1
|
|
dimension 23
|
|
uid 133,0
|
|
)
|
|
*81 (MRCItem
|
|
litem &58
|
|
pos 2
|
|
hidden 1
|
|
dimension 20
|
|
uid 134,0
|
|
)
|
|
*82 (MRCItem
|
|
litem &67
|
|
pos 0
|
|
dimension 20
|
|
uid 593,0
|
|
)
|
|
*83 (MRCItem
|
|
litem &68
|
|
pos 1
|
|
dimension 20
|
|
uid 595,0
|
|
)
|
|
*84 (MRCItem
|
|
litem &69
|
|
pos 2
|
|
dimension 20
|
|
uid 597,0
|
|
)
|
|
*85 (MRCItem
|
|
litem &70
|
|
pos 3
|
|
dimension 20
|
|
uid 652,0
|
|
)
|
|
*86 (MRCItem
|
|
litem &71
|
|
pos 4
|
|
dimension 20
|
|
uid 661,0
|
|
)
|
|
*87 (MRCItem
|
|
litem &72
|
|
pos 5
|
|
dimension 20
|
|
uid 663,0
|
|
)
|
|
*88 (MRCItem
|
|
litem &73
|
|
pos 6
|
|
dimension 20
|
|
uid 679,0
|
|
)
|
|
*89 (MRCItem
|
|
litem &74
|
|
pos 7
|
|
dimension 20
|
|
uid 681,0
|
|
)
|
|
*90 (MRCItem
|
|
litem &75
|
|
pos 8
|
|
dimension 20
|
|
uid 740,0
|
|
)
|
|
*91 (MRCItem
|
|
litem &76
|
|
pos 9
|
|
dimension 20
|
|
uid 825,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 135,0
|
|
optionalChildren [
|
|
*92 (MRCItem
|
|
litem &59
|
|
pos 0
|
|
dimension 20
|
|
uid 136,0
|
|
)
|
|
*93 (MRCItem
|
|
litem &61
|
|
pos 1
|
|
dimension 50
|
|
uid 137,0
|
|
)
|
|
*94 (MRCItem
|
|
litem &62
|
|
pos 2
|
|
dimension 100
|
|
uid 138,0
|
|
)
|
|
*95 (MRCItem
|
|
litem &63
|
|
pos 3
|
|
dimension 100
|
|
uid 139,0
|
|
)
|
|
*96 (MRCItem
|
|
litem &64
|
|
pos 4
|
|
dimension 50
|
|
uid 140,0
|
|
)
|
|
*97 (MRCItem
|
|
litem &65
|
|
pos 5
|
|
dimension 50
|
|
uid 141,0
|
|
)
|
|
*98 (MRCItem
|
|
litem &66
|
|
pos 6
|
|
dimension 80
|
|
uid 142,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 3
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 130,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 116,0
|
|
type 1
|
|
)
|
|
VExpander (VariableExpander
|
|
vvMap [
|
|
(vvPair
|
|
variable "HDLDir"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hdl"
|
|
)
|
|
(vvPair
|
|
variable "HDSDir"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds"
|
|
)
|
|
(vvPair
|
|
variable "SideDataDesignDir"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds\\instruction@decoder\\symbol.sb.info"
|
|
)
|
|
(vvPair
|
|
variable "SideDataUserDir"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds\\instruction@decoder\\symbol.sb.user"
|
|
)
|
|
(vvPair
|
|
variable "SourceDir"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds"
|
|
)
|
|
(vvPair
|
|
variable "appl"
|
|
value "HDL Designer"
|
|
)
|
|
(vvPair
|
|
variable "arch_name"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "concat_file"
|
|
value "concatenated"
|
|
)
|
|
(vvPair
|
|
variable "config"
|
|
value "%(unit)_%(view)_config"
|
|
)
|
|
(vvPair
|
|
variable "d"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds\\instruction@decoder"
|
|
)
|
|
(vvPair
|
|
variable "d_logical"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds\\instructionDecoder"
|
|
)
|
|
(vvPair
|
|
variable "date"
|
|
value "05.03.2015"
|
|
)
|
|
(vvPair
|
|
variable "day"
|
|
value "jeu."
|
|
)
|
|
(vvPair
|
|
variable "day_long"
|
|
value "jeudi"
|
|
)
|
|
(vvPair
|
|
variable "dd"
|
|
value "05"
|
|
)
|
|
(vvPair
|
|
variable "designName"
|
|
value "$DESIGN_NAME"
|
|
)
|
|
(vvPair
|
|
variable "entity_name"
|
|
value "instructionDecoder"
|
|
)
|
|
(vvPair
|
|
variable "ext"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "f"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "f_logical"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "f_noext"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "group"
|
|
value "UNKNOWN"
|
|
)
|
|
(vvPair
|
|
variable "host"
|
|
value "WE3673"
|
|
)
|
|
(vvPair
|
|
variable "language"
|
|
value "VHDL"
|
|
)
|
|
(vvPair
|
|
variable "library"
|
|
value "NanoBlaze"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_HdsLintPlugin"
|
|
value "$HDS_PROJECT_DIR/../NanoBlaze/designcheck"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_ModelSimCompiler"
|
|
value "$SCRATCH_DIR/SEm/NanoBlaze/work"
|
|
)
|
|
(vvPair
|
|
variable "mm"
|
|
value "03"
|
|
)
|
|
(vvPair
|
|
variable "module_name"
|
|
value "instructionDecoder"
|
|
)
|
|
(vvPair
|
|
variable "month"
|
|
value "mars"
|
|
)
|
|
(vvPair
|
|
variable "month_long"
|
|
value "mars"
|
|
)
|
|
(vvPair
|
|
variable "p"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds\\instruction@decoder\\symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "p_logical"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds\\instructionDecoder\\symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "package_name"
|
|
value "<Undefined Variable>"
|
|
)
|
|
(vvPair
|
|
variable "project_name"
|
|
value "hds-beamer"
|
|
)
|
|
(vvPair
|
|
variable "series"
|
|
value "HDL Designer Series"
|
|
)
|
|
(vvPair
|
|
variable "task_DesignCompilerPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_HDSPath"
|
|
value "$HDS_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEBinPath"
|
|
value "$ISE_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEPath"
|
|
value "$ISE_SCRATCH_WORK_DIR"
|
|
)
|
|
(vvPair
|
|
variable "task_LeonardoPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_ModelSimPath"
|
|
value "$MODELSIM_HOME\\win32"
|
|
)
|
|
(vvPair
|
|
variable "task_NC-SimPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_PrecisionRTLPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_QuestaSimPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_VCSPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "this_ext"
|
|
value "sb"
|
|
)
|
|
(vvPair
|
|
variable "this_file"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "this_file_logical"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "time"
|
|
value "11:25:24"
|
|
)
|
|
(vvPair
|
|
variable "unit"
|
|
value "instructionDecoder"
|
|
)
|
|
(vvPair
|
|
variable "user"
|
|
value "francois"
|
|
)
|
|
(vvPair
|
|
variable "version"
|
|
value "2009.2 (Build 10)"
|
|
)
|
|
(vvPair
|
|
variable "view"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "year"
|
|
value "2015"
|
|
)
|
|
(vvPair
|
|
variable "yy"
|
|
value "15"
|
|
)
|
|
]
|
|
)
|
|
LanguageMgr "VhdlLangMgr"
|
|
uid 86,0
|
|
optionalChildren [
|
|
*99 (SymbolBody
|
|
uid 8,0
|
|
optionalChildren [
|
|
*100 (CptPort
|
|
uid 56,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 705,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "44625,41000,45375,41750"
|
|
)
|
|
tg (CPTG
|
|
uid 58,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 59,0
|
|
va (VaSet
|
|
)
|
|
xt "43000,39000,46200,40000"
|
|
st "aluCode"
|
|
blo "43000,39800"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 60,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,10400,37500,11200"
|
|
st "aluCode : OUT std_ulogic_vector ( aluCodeBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "aluCode"
|
|
t "std_ulogic_vector"
|
|
b "( aluCodeBitNb-1 DOWNTO 0 )"
|
|
o 4
|
|
suid 2,0
|
|
)
|
|
)
|
|
)
|
|
*101 (CptPort
|
|
uid 71,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 72,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "65000,30625,65750,31375"
|
|
)
|
|
tg (CPTG
|
|
uid 73,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 74,0
|
|
va (VaSet
|
|
)
|
|
xt "58300,30500,64000,31500"
|
|
st "portIndexedSel"
|
|
ju 2
|
|
blo "64000,31300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 75,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,16000,20000,16800"
|
|
st "portIndexedSel : OUT std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "portIndexedSel"
|
|
t "std_ulogic"
|
|
o 6
|
|
suid 5,0
|
|
)
|
|
)
|
|
)
|
|
*102 (CptPort
|
|
uid 400,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 706,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "48625,41000,49375,41750"
|
|
)
|
|
tg (CPTG
|
|
uid 402,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 403,0
|
|
va (VaSet
|
|
)
|
|
xt "48000,39000,50400,40000"
|
|
st "addrA"
|
|
blo "48000,39800"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 404,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,8800,37000,9600"
|
|
st "addrA : OUT unsigned ( registerAddressBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "addrA"
|
|
t "unsigned"
|
|
b "( registerAddressBitNb-1 DOWNTO 0 )"
|
|
o 2
|
|
suid 9,0
|
|
)
|
|
)
|
|
)
|
|
*103 (CptPort
|
|
uid 405,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 707,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "52625,41000,53375,41750"
|
|
)
|
|
tg (CPTG
|
|
uid 407,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 408,0
|
|
va (VaSet
|
|
)
|
|
xt "52000,39000,54400,40000"
|
|
st "addrB"
|
|
blo "52000,39800"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 409,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,9600,37000,10400"
|
|
st "addrB : OUT unsigned ( registerAddressBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "addrB"
|
|
t "unsigned"
|
|
b "( registerAddressBitNb-1 DOWNTO 0 )"
|
|
o 3
|
|
suid 10,0
|
|
)
|
|
)
|
|
)
|
|
*104 (CptPort
|
|
uid 410,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 708,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "60625,41000,61375,41750"
|
|
)
|
|
tg (CPTG
|
|
uid 412,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 413,0
|
|
va (VaSet
|
|
)
|
|
xt "59000,39000,62500,40000"
|
|
st "instrData"
|
|
blo "59000,39800"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 414,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,12800,32500,13600"
|
|
st "instrData : OUT signed ( registerBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "instrData"
|
|
t "signed"
|
|
b "( registerBitNb-1 DOWNTO 0 )"
|
|
o 8
|
|
suid 11,0
|
|
)
|
|
)
|
|
)
|
|
*105 (CptPort
|
|
uid 441,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 493,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,34625,41000,35375"
|
|
)
|
|
tg (CPTG
|
|
uid 443,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 444,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,34500,45000,35500"
|
|
st "opCode"
|
|
blo "42000,35300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 445,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,14400,37000,15200"
|
|
st "opCode : OUT std_ulogic_vector ( opCodeBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "opCode"
|
|
t "std_ulogic_vector"
|
|
b "( opCodeBitNb-1 DOWNTO 0 )"
|
|
o 10
|
|
suid 16,0
|
|
)
|
|
)
|
|
)
|
|
*106 (CptPort
|
|
uid 463,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 464,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "65000,32625,65750,33375"
|
|
)
|
|
tg (CPTG
|
|
uid 465,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 466,0
|
|
va (VaSet
|
|
)
|
|
xt "59100,32500,64000,33500"
|
|
st "portAddress"
|
|
ju 2
|
|
blo "64000,33300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 467,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,15200,34000,16000"
|
|
st "portAddress : OUT unsigned (portAddressBitNb-1 DOWNTO 0) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "portAddress"
|
|
t "unsigned"
|
|
b "(portAddressBitNb-1 DOWNTO 0)"
|
|
o 11
|
|
suid 18,0
|
|
)
|
|
)
|
|
)
|
|
*107 (CptPort
|
|
uid 494,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 524,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "65000,28625,65750,29375"
|
|
)
|
|
tg (CPTG
|
|
uid 496,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 497,0
|
|
va (VaSet
|
|
)
|
|
xt "59700,28500,64000,29500"
|
|
st "instruction"
|
|
ju 2
|
|
blo "64000,29300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 498,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,8000,39500,8800"
|
|
st "instruction : IN std_ulogic_vector ( instructionBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "instruction"
|
|
t "std_ulogic_vector"
|
|
b "( instructionBitNb-1 DOWNTO 0 )"
|
|
o 1
|
|
suid 19,0
|
|
)
|
|
)
|
|
)
|
|
*108 (CptPort
|
|
uid 653,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 654,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "52625,24250,53375,25000"
|
|
)
|
|
tg (CPTG
|
|
uid 655,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 656,0
|
|
va (VaSet
|
|
)
|
|
xt "50000,26000,55100,27000"
|
|
st "instrAddress"
|
|
blo "50000,26800"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 657,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,12000,36500,12800"
|
|
st "instrAddress : OUT unsigned ( programCounterBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "instrAddress"
|
|
t "unsigned"
|
|
b "( programCounterBitNb-1 DOWNTO 0 )"
|
|
o 7
|
|
suid 24,0
|
|
)
|
|
)
|
|
)
|
|
*109 (CptPort
|
|
uid 664,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 665,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,30625,41000,31375"
|
|
)
|
|
tg (CPTG
|
|
uid 666,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 667,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,30500,46900,31500"
|
|
st "branchCond"
|
|
blo "42000,31300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 668,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,11200,38000,12000"
|
|
st "branchCond : OUT std_ulogic_vector (branchCondBitNb-1 DOWNTO 0) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "branchCond"
|
|
t "std_ulogic_vector"
|
|
b "(branchCondBitNb-1 DOWNTO 0)"
|
|
o 5
|
|
suid 25,0
|
|
)
|
|
)
|
|
)
|
|
*110 (CptPort
|
|
uid 669,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 670,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,28625,41000,29375"
|
|
)
|
|
tg (CPTG
|
|
uid 671,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 672,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,28500,45000,29500"
|
|
st "intCode"
|
|
blo "42000,29300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 673,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,13600,37500,14400"
|
|
st "intCode : OUT std_ulogic_vector ( intCodeBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "intCode"
|
|
t "std_ulogic_vector"
|
|
b "( intCodeBitNb-1 DOWNTO 0 )"
|
|
o 9
|
|
suid 26,0
|
|
)
|
|
)
|
|
)
|
|
*111 (CptPort
|
|
uid 741,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 742,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "65000,36625,65750,37375"
|
|
)
|
|
tg (CPTG
|
|
uid 743,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 744,0
|
|
va (VaSet
|
|
)
|
|
xt "58800,36500,64000,37500"
|
|
st "spadAddress"
|
|
ju 2
|
|
blo "64000,37300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 745,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,16800,35000,17600"
|
|
st "spadAddress : OUT unsigned ( spadAddressBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "spadAddress"
|
|
t "unsigned"
|
|
b "( spadAddressBitNb-1 DOWNTO 0 )"
|
|
o 12
|
|
suid 28,0
|
|
)
|
|
)
|
|
)
|
|
*112 (CptPort
|
|
uid 794,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 795,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "65000,34625,65750,35375"
|
|
)
|
|
tg (CPTG
|
|
uid 796,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 797,0
|
|
va (VaSet
|
|
)
|
|
xt "58000,34500,64000,35500"
|
|
st "spadIndexedSel"
|
|
ju 2
|
|
blo "64000,35300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 798,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,17600,20000,18400"
|
|
st "spadIndexedSel : OUT std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "spadIndexedSel"
|
|
t "std_ulogic"
|
|
o 13
|
|
suid 29,0
|
|
)
|
|
)
|
|
)
|
|
*113 (CptPort
|
|
uid 895,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 896,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,36625,41000,37375"
|
|
)
|
|
tg (CPTG
|
|
uid 897,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 898,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,36500,46900,37500"
|
|
st "twoRegInstr"
|
|
blo "42000,37300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 899,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,18400,19000,19200"
|
|
st "twoRegInstr : OUT std_ulogic "
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "twoRegInstr"
|
|
t "std_ulogic"
|
|
o 14
|
|
suid 30,0
|
|
)
|
|
)
|
|
)
|
|
]
|
|
shape (Rectangle
|
|
uid 9,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
lineColor "0,32896,0"
|
|
lineWidth 2
|
|
)
|
|
xt "41000,25000,65000,41000"
|
|
)
|
|
oxt "15000,6000,31000,20000"
|
|
biTextGroup (BiTextGroup
|
|
uid 10,0
|
|
ps "CenterOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
first (Text
|
|
uid 11,0
|
|
va (VaSet
|
|
font "Arial,8,1"
|
|
)
|
|
xt "41600,41000,46000,42000"
|
|
st "NanoBlaze"
|
|
blo "41600,41800"
|
|
)
|
|
second (Text
|
|
uid 12,0
|
|
va (VaSet
|
|
font "Arial,8,1"
|
|
)
|
|
xt "41600,42000,49600,43000"
|
|
st "instructionDecoder"
|
|
blo "41600,42800"
|
|
)
|
|
)
|
|
gi *114 (GenericInterface
|
|
uid 13,0
|
|
ps "CenterOffsetStrategy"
|
|
matrix (Matrix
|
|
uid 14,0
|
|
text (MLText
|
|
uid 15,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "41000,44200,59500,53800"
|
|
st "Generic Declarations
|
|
|
|
registerBitNb positive 8
|
|
registerAddressBitNb positive 4
|
|
aluCodeBitNb positive 5
|
|
instructionBitNb positive 18
|
|
programCounterBitNb positive 10
|
|
opCodeBitNb positive 5
|
|
branchCondBitNb positive 3
|
|
intCodeBitNb positive 5
|
|
spadAddressBitNb natural 4
|
|
portAddressBitNb positive 8
|
|
"
|
|
)
|
|
header "Generic Declarations"
|
|
showHdrWhenContentsEmpty 1
|
|
)
|
|
elements [
|
|
(GiElement
|
|
name "registerBitNb"
|
|
type "positive"
|
|
value "8"
|
|
)
|
|
(GiElement
|
|
name "registerAddressBitNb"
|
|
type "positive"
|
|
value "4"
|
|
)
|
|
(GiElement
|
|
name "aluCodeBitNb"
|
|
type "positive"
|
|
value "5"
|
|
)
|
|
(GiElement
|
|
name "instructionBitNb"
|
|
type "positive"
|
|
value "18"
|
|
)
|
|
(GiElement
|
|
name "programCounterBitNb"
|
|
type "positive"
|
|
value "10"
|
|
)
|
|
(GiElement
|
|
name "opCodeBitNb"
|
|
type "positive"
|
|
value "5"
|
|
)
|
|
(GiElement
|
|
name "branchCondBitNb"
|
|
type "positive"
|
|
value "3"
|
|
)
|
|
(GiElement
|
|
name "intCodeBitNb"
|
|
type "positive"
|
|
value "5"
|
|
)
|
|
(GiElement
|
|
name "spadAddressBitNb"
|
|
type "natural"
|
|
value "4"
|
|
)
|
|
(GiElement
|
|
name "portAddressBitNb"
|
|
type "positive"
|
|
value "8"
|
|
)
|
|
]
|
|
)
|
|
portInstanceVisAsIs 1
|
|
portInstanceVis (PortSigDisplay
|
|
sTC 0
|
|
sF 0
|
|
)
|
|
portVis (PortSigDisplay
|
|
sTC 0
|
|
sF 0
|
|
)
|
|
)
|
|
*115 (Grouping
|
|
uid 16,0
|
|
optionalChildren [
|
|
*116 (CommentText
|
|
uid 18,0
|
|
shape (Rectangle
|
|
uid 19,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "58000,65000,75000,66000"
|
|
)
|
|
oxt "18000,70000,35000,71000"
|
|
text (MLText
|
|
uid 20,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
)
|
|
xt "58200,65000,66900,66000"
|
|
st "
|
|
by %user on %dd %month %year
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1000
|
|
visibleWidth 17000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*117 (CommentText
|
|
uid 21,0
|
|
shape (Rectangle
|
|
uid 22,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "75000,61000,79000,62000"
|
|
)
|
|
oxt "35000,66000,39000,67000"
|
|
text (MLText
|
|
uid 23,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
)
|
|
xt "75200,61000,78200,62000"
|
|
st "
|
|
Project:
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1000
|
|
visibleWidth 4000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*118 (CommentText
|
|
uid 24,0
|
|
shape (Rectangle
|
|
uid 25,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "58000,63000,75000,64000"
|
|
)
|
|
oxt "18000,68000,35000,69000"
|
|
text (MLText
|
|
uid 26,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
)
|
|
xt "58200,63000,68200,64000"
|
|
st "
|
|
<enter diagram title here>
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1000
|
|
visibleWidth 17000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*119 (CommentText
|
|
uid 27,0
|
|
shape (Rectangle
|
|
uid 28,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "54000,63000,58000,64000"
|
|
)
|
|
oxt "14000,68000,18000,69000"
|
|
text (MLText
|
|
uid 29,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
)
|
|
xt "54200,63000,56300,64000"
|
|
st "
|
|
Title:
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1000
|
|
visibleWidth 4000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*120 (CommentText
|
|
uid 30,0
|
|
shape (Rectangle
|
|
uid 31,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "75000,62000,95000,66000"
|
|
)
|
|
oxt "35000,67000,55000,71000"
|
|
text (MLText
|
|
uid 32,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
)
|
|
xt "75200,62200,84400,63200"
|
|
st "
|
|
<enter comments here>
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 4000
|
|
visibleWidth 20000
|
|
)
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*121 (CommentText
|
|
uid 33,0
|
|
shape (Rectangle
|
|
uid 34,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "79000,61000,95000,62000"
|
|
)
|
|
oxt "39000,66000,55000,67000"
|
|
text (MLText
|
|
uid 35,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
)
|
|
xt "79200,61000,80800,62000"
|
|
st "
|
|
%project_name
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1000
|
|
visibleWidth 16000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*122 (CommentText
|
|
uid 36,0
|
|
shape (Rectangle
|
|
uid 37,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "54000,61000,75000,63000"
|
|
)
|
|
oxt "14000,66000,35000,68000"
|
|
text (MLText
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