2686 lines
33 KiB
Plaintext
2686 lines
33 KiB
Plaintext
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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(DmPackageRef
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library "AhbLite"
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unitName "ahbLite"
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)
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]
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libraryRefs [
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"ieee"
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"AhbLite"
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]
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)
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version "27.1"
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appVersion "2019.2 (Build 5)"
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model (Symbol
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commonDM (CommonDM
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ldm (LogicalDM
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suid 147,0
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usingSuid 1
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emptyRow *1 (LEmptyRow
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)
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uid 200,0
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optionalChildren [
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*2 (RefLabelRowHdr
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)
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*3 (TitleRowHdr
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)
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*4 (FilterRowHdr
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)
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|
*5 (RefLabelColHdr
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tm "RefLabelColHdrMgr"
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)
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|
*6 (RowExpandColHdr
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tm "RowExpandColHdrMgr"
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)
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|
*7 (GroupColHdr
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tm "GroupColHdrMgr"
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)
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*8 (NameColHdr
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tm "NameColHdrMgr"
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)
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*9 (ModeColHdr
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tm "ModeColHdrMgr"
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)
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|
*10 (TypeColHdr
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tm "TypeColHdrMgr"
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)
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|
*11 (BoundsColHdr
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tm "BoundsColHdrMgr"
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)
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*12 (InitColHdr
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tm "InitColHdrMgr"
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)
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*13 (EolColHdr
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tm "EolColHdrMgr"
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)
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|
*14 (LogPort
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port (LogicalPort
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|
m 1
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|
decl (Decl
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n "clock"
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t "std_ulogic"
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o 1
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suid 127,0
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)
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)
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uid 1306,0
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)
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*15 (LogPort
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port (LogicalPort
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decl (Decl
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n "hAddr"
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t "unsigned"
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b "(ahbAddressBitNb-1 DOWNTO 0)"
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o 2
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suid 128,0
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)
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)
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uid 1308,0
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)
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*16 (LogPort
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port (LogicalPort
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decl (Decl
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n "hClk"
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t "std_uLogic"
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o 4
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suid 129,0
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)
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)
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uid 1310,0
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)
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*17 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "hRDataPeriph1"
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t "std_ulogic_vector"
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b "(ahbDataBitNb-1 DOWNTO 0)"
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o 8
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suid 130,0
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)
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)
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uid 1312,0
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)
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*18 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "hRDataPeriph2"
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t "std_ulogic_vector"
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b "(ahbDataBitNb-1 DOWNTO 0)"
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o 9
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suid 131,0
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)
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)
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uid 1314,0
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)
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*19 (LogPort
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port (LogicalPort
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m 1
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|
decl (Decl
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n "hReadyPeriph1"
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t "std_uLogic"
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o 12
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suid 132,0
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)
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)
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uid 1316,0
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)
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*20 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "hReadyPeriph2"
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t "std_uLogic"
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o 13
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suid 133,0
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)
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)
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uid 1318,0
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)
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*21 (LogPort
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port (LogicalPort
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decl (Decl
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n "hReset_n"
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t "std_uLogic"
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o 15
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suid 134,0
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)
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)
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uid 1320,0
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)
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*22 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "hRespPeriph1"
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t "std_uLogic"
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o 17
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suid 135,0
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)
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)
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uid 1322,0
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)
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*23 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "hRespPeriph2"
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t "std_uLogic"
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o 18
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suid 136,0
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)
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)
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uid 1324,0
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)
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*24 (LogPort
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port (LogicalPort
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decl (Decl
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n "hSelPeriph1"
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t "std_uLogic"
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o 20
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suid 137,0
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)
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)
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uid 1326,0
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)
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*25 (LogPort
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port (LogicalPort
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|
decl (Decl
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n "hSelPeriph2"
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t "std_uLogic"
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o 21
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suid 138,0
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)
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)
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uid 1328,0
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)
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*26 (LogPort
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port (LogicalPort
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decl (Decl
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n "hTrans"
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t "std_ulogic_vector"
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b "(ahbTransBitNb-1 DOWNTO 0)"
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o 24
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suid 139,0
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)
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)
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uid 1330,0
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)
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*27 (LogPort
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port (LogicalPort
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|
decl (Decl
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|
n "hWData"
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t "std_ulogic_vector"
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|
b "(ahbDataBitNb-1 DOWNTO 0)"
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o 25
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suid 140,0
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)
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)
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uid 1332,0
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)
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*28 (LogPort
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port (LogicalPort
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|
decl (Decl
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|
n "hWrite"
|
|
t "std_uLogic"
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|
o 26
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suid 141,0
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)
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)
|
|
uid 1334,0
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)
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*29 (LogPort
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port (LogicalPort
|
|
m 1
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|
decl (Decl
|
|
n "reset"
|
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t "std_ulogic"
|
|
o 27
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suid 142,0
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)
|
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)
|
|
uid 1336,0
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)
|
|
*30 (LogPort
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port (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "upAddress"
|
|
t "unsigned"
|
|
b "(ahbAddressBitNb-1 DOWNTO 0)"
|
|
o 28
|
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suid 143,0
|
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)
|
|
)
|
|
uid 1338,0
|
|
)
|
|
*31 (LogPort
|
|
port (LogicalPort
|
|
decl (Decl
|
|
n "upDataIn"
|
|
t "std_ulogic_vector"
|
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
|
o 29
|
|
suid 144,0
|
|
)
|
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)
|
|
uid 1340,0
|
|
)
|
|
*32 (LogPort
|
|
port (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "upDataOut"
|
|
t "std_ulogic_vector"
|
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
|
o 30
|
|
suid 145,0
|
|
)
|
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)
|
|
uid 1342,0
|
|
)
|
|
*33 (LogPort
|
|
port (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "upReadStrobe"
|
|
t "std_uLogic"
|
|
o 31
|
|
suid 146,0
|
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)
|
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)
|
|
uid 1344,0
|
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)
|
|
*34 (LogPort
|
|
port (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "upWriteStrobe"
|
|
t "std_uLogic"
|
|
o 32
|
|
suid 147,0
|
|
)
|
|
)
|
|
uid 1346,0
|
|
)
|
|
]
|
|
)
|
|
pdm (PhysicalDM
|
|
displayShortBounds 1
|
|
editShortBounds 1
|
|
uid 213,0
|
|
optionalChildren [
|
|
*35 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
emptyMRCItem *36 (MRCItem
|
|
litem &1
|
|
pos 21
|
|
dimension 20
|
|
)
|
|
uid 215,0
|
|
optionalChildren [
|
|
*37 (MRCItem
|
|
litem &2
|
|
pos 0
|
|
dimension 20
|
|
uid 216,0
|
|
)
|
|
*38 (MRCItem
|
|
litem &3
|
|
pos 1
|
|
dimension 23
|
|
uid 217,0
|
|
)
|
|
*39 (MRCItem
|
|
litem &4
|
|
pos 2
|
|
hidden 1
|
|
dimension 20
|
|
uid 218,0
|
|
)
|
|
*40 (MRCItem
|
|
litem &14
|
|
pos 0
|
|
dimension 20
|
|
uid 1307,0
|
|
)
|
|
*41 (MRCItem
|
|
litem &15
|
|
pos 1
|
|
dimension 20
|
|
uid 1309,0
|
|
)
|
|
*42 (MRCItem
|
|
litem &16
|
|
pos 2
|
|
dimension 20
|
|
uid 1311,0
|
|
)
|
|
*43 (MRCItem
|
|
litem &17
|
|
pos 3
|
|
dimension 20
|
|
uid 1313,0
|
|
)
|
|
*44 (MRCItem
|
|
litem &18
|
|
pos 4
|
|
dimension 20
|
|
uid 1315,0
|
|
)
|
|
*45 (MRCItem
|
|
litem &19
|
|
pos 5
|
|
dimension 20
|
|
uid 1317,0
|
|
)
|
|
*46 (MRCItem
|
|
litem &20
|
|
pos 6
|
|
dimension 20
|
|
uid 1319,0
|
|
)
|
|
*47 (MRCItem
|
|
litem &21
|
|
pos 7
|
|
dimension 20
|
|
uid 1321,0
|
|
)
|
|
*48 (MRCItem
|
|
litem &22
|
|
pos 8
|
|
dimension 20
|
|
uid 1323,0
|
|
)
|
|
*49 (MRCItem
|
|
litem &23
|
|
pos 9
|
|
dimension 20
|
|
uid 1325,0
|
|
)
|
|
*50 (MRCItem
|
|
litem &24
|
|
pos 10
|
|
dimension 20
|
|
uid 1327,0
|
|
)
|
|
*51 (MRCItem
|
|
litem &25
|
|
pos 11
|
|
dimension 20
|
|
uid 1329,0
|
|
)
|
|
*52 (MRCItem
|
|
litem &26
|
|
pos 12
|
|
dimension 20
|
|
uid 1331,0
|
|
)
|
|
*53 (MRCItem
|
|
litem &27
|
|
pos 13
|
|
dimension 20
|
|
uid 1333,0
|
|
)
|
|
*54 (MRCItem
|
|
litem &28
|
|
pos 14
|
|
dimension 20
|
|
uid 1335,0
|
|
)
|
|
*55 (MRCItem
|
|
litem &29
|
|
pos 15
|
|
dimension 20
|
|
uid 1337,0
|
|
)
|
|
*56 (MRCItem
|
|
litem &30
|
|
pos 16
|
|
dimension 20
|
|
uid 1339,0
|
|
)
|
|
*57 (MRCItem
|
|
litem &31
|
|
pos 17
|
|
dimension 20
|
|
uid 1341,0
|
|
)
|
|
*58 (MRCItem
|
|
litem &32
|
|
pos 18
|
|
dimension 20
|
|
uid 1343,0
|
|
)
|
|
*59 (MRCItem
|
|
litem &33
|
|
pos 19
|
|
dimension 20
|
|
uid 1345,0
|
|
)
|
|
*60 (MRCItem
|
|
litem &34
|
|
pos 20
|
|
dimension 20
|
|
uid 1347,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 219,0
|
|
optionalChildren [
|
|
*61 (MRCItem
|
|
litem &5
|
|
pos 0
|
|
dimension 20
|
|
uid 220,0
|
|
)
|
|
*62 (MRCItem
|
|
litem &7
|
|
pos 1
|
|
dimension 50
|
|
uid 221,0
|
|
)
|
|
*63 (MRCItem
|
|
litem &8
|
|
pos 2
|
|
dimension 100
|
|
uid 222,0
|
|
)
|
|
*64 (MRCItem
|
|
litem &9
|
|
pos 3
|
|
dimension 50
|
|
uid 223,0
|
|
)
|
|
*65 (MRCItem
|
|
litem &10
|
|
pos 4
|
|
dimension 100
|
|
uid 224,0
|
|
)
|
|
*66 (MRCItem
|
|
litem &11
|
|
pos 5
|
|
dimension 100
|
|
uid 225,0
|
|
)
|
|
*67 (MRCItem
|
|
litem &12
|
|
pos 6
|
|
dimension 50
|
|
uid 226,0
|
|
)
|
|
*68 (MRCItem
|
|
litem &13
|
|
pos 7
|
|
dimension 80
|
|
uid 227,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 4
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 214,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 199,0
|
|
)
|
|
genericsCommonDM (CommonDM
|
|
ldm (LogicalDM
|
|
emptyRow *69 (LEmptyRow
|
|
)
|
|
uid 229,0
|
|
optionalChildren [
|
|
*70 (RefLabelRowHdr
|
|
)
|
|
*71 (TitleRowHdr
|
|
)
|
|
*72 (FilterRowHdr
|
|
)
|
|
*73 (RefLabelColHdr
|
|
tm "RefLabelColHdrMgr"
|
|
)
|
|
*74 (RowExpandColHdr
|
|
tm "RowExpandColHdrMgr"
|
|
)
|
|
*75 (GroupColHdr
|
|
tm "GroupColHdrMgr"
|
|
)
|
|
*76 (NameColHdr
|
|
tm "GenericNameColHdrMgr"
|
|
)
|
|
*77 (TypeColHdr
|
|
tm "GenericTypeColHdrMgr"
|
|
)
|
|
*78 (InitColHdr
|
|
tm "GenericValueColHdrMgr"
|
|
)
|
|
*79 (PragmaColHdr
|
|
tm "GenericPragmaColHdrMgr"
|
|
)
|
|
*80 (EolColHdr
|
|
tm "GenericEolColHdrMgr"
|
|
)
|
|
*81 (LogGeneric
|
|
generic (GiElement
|
|
name "periph2BaseAddress"
|
|
type "natural"
|
|
value ""
|
|
)
|
|
uid 641,0
|
|
)
|
|
*82 (LogGeneric
|
|
generic (GiElement
|
|
name "clockFrequency"
|
|
type "real"
|
|
value ""
|
|
)
|
|
uid 1176,0
|
|
)
|
|
]
|
|
)
|
|
pdm (PhysicalDM
|
|
displayShortBounds 1
|
|
editShortBounds 1
|
|
uid 241,0
|
|
optionalChildren [
|
|
*83 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
emptyMRCItem *84 (MRCItem
|
|
litem &69
|
|
pos 2
|
|
dimension 20
|
|
)
|
|
uid 243,0
|
|
optionalChildren [
|
|
*85 (MRCItem
|
|
litem &70
|
|
pos 0
|
|
dimension 20
|
|
uid 244,0
|
|
)
|
|
*86 (MRCItem
|
|
litem &71
|
|
pos 1
|
|
dimension 23
|
|
uid 245,0
|
|
)
|
|
*87 (MRCItem
|
|
litem &72
|
|
pos 2
|
|
hidden 1
|
|
dimension 20
|
|
uid 246,0
|
|
)
|
|
*88 (MRCItem
|
|
litem &81
|
|
pos 0
|
|
dimension 20
|
|
uid 642,0
|
|
)
|
|
*89 (MRCItem
|
|
litem &82
|
|
pos 1
|
|
dimension 20
|
|
uid 1177,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 247,0
|
|
optionalChildren [
|
|
*90 (MRCItem
|
|
litem &73
|
|
pos 0
|
|
dimension 20
|
|
uid 248,0
|
|
)
|
|
*91 (MRCItem
|
|
litem &75
|
|
pos 1
|
|
dimension 50
|
|
uid 249,0
|
|
)
|
|
*92 (MRCItem
|
|
litem &76
|
|
pos 2
|
|
dimension 100
|
|
uid 250,0
|
|
)
|
|
*93 (MRCItem
|
|
litem &77
|
|
pos 3
|
|
dimension 100
|
|
uid 251,0
|
|
)
|
|
*94 (MRCItem
|
|
litem &78
|
|
pos 4
|
|
dimension 50
|
|
uid 252,0
|
|
)
|
|
*95 (MRCItem
|
|
litem &79
|
|
pos 5
|
|
dimension 50
|
|
uid 253,0
|
|
)
|
|
*96 (MRCItem
|
|
litem &80
|
|
pos 6
|
|
dimension 80
|
|
uid 254,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 3
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 242,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 228,0
|
|
type 1
|
|
)
|
|
VExpander (VariableExpander
|
|
vvMap [
|
|
(vvPair
|
|
variable "HDLDir"
|
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\..\\Libs\\AhbLite_test\\hdl"
|
|
)
|
|
(vvPair
|
|
variable "HDSDir"
|
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\..\\Libs\\AhbLite_test\\hds"
|
|
)
|
|
(vvPair
|
|
variable "SideDataDesignDir"
|
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\..\\Libs\\AhbLite_test\\hds\\ahb@lite_tester\\interface.info"
|
|
)
|
|
(vvPair
|
|
variable "SideDataUserDir"
|
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\..\\Libs\\AhbLite_test\\hds\\ahb@lite_tester\\interface.user"
|
|
)
|
|
(vvPair
|
|
variable "SourceDir"
|
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\..\\Libs\\AhbLite_test\\hds"
|
|
)
|
|
(vvPair
|
|
variable "appl"
|
|
value "HDL Designer"
|
|
)
|
|
(vvPair
|
|
variable "arch_name"
|
|
value "interface"
|
|
)
|
|
(vvPair
|
|
variable "asm_file"
|
|
value "nanoTest.asm"
|
|
)
|
|
(vvPair
|
|
variable "concat_file"
|
|
value "concatenated"
|
|
)
|
|
(vvPair
|
|
variable "config"
|
|
value "%(unit)_%(view)_config"
|
|
)
|
|
(vvPair
|
|
variable "d"
|
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\..\\Libs\\AhbLite_test\\hds\\ahb@lite_tester"
|
|
)
|
|
(vvPair
|
|
variable "d_logical"
|
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\..\\Libs\\AhbLite_test\\hds\\ahbLite_tester"
|
|
)
|
|
(vvPair
|
|
variable "date"
|
|
value "28.04.2023"
|
|
)
|
|
(vvPair
|
|
variable "day"
|
|
value "ven."
|
|
)
|
|
(vvPair
|
|
variable "day_long"
|
|
value "vendredi"
|
|
)
|
|
(vvPair
|
|
variable "dd"
|
|
value "28"
|
|
)
|
|
(vvPair
|
|
variable "designName"
|
|
value "$DESIGN_NAME"
|
|
)
|
|
(vvPair
|
|
variable "entity_name"
|
|
value "ahbLite_tester"
|
|
)
|
|
(vvPair
|
|
variable "ext"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "f"
|
|
value "interface"
|
|
)
|
|
(vvPair
|
|
variable "f_logical"
|
|
value "interface"
|
|
)
|
|
(vvPair
|
|
variable "f_noext"
|
|
value "interface"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_author"
|
|
value "axel.amand"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_date"
|
|
value "28.04.2023"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_group"
|
|
value "UNKNOWN"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_host"
|
|
value "WE7860"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_time"
|
|
value "15:16:10"
|
|
)
|
|
(vvPair
|
|
variable "group"
|
|
value "UNKNOWN"
|
|
)
|
|
(vvPair
|
|
variable "host"
|
|
value "WE7860"
|
|
)
|
|
(vvPair
|
|
variable "language"
|
|
value "VHDL"
|
|
)
|
|
(vvPair
|
|
variable "library"
|
|
value "AhbLite_test"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_ModelSimCompiler"
|
|
value "$SCRATCH_DIR/AhbLite_test"
|
|
)
|
|
(vvPair
|
|
variable "mm"
|
|
value "04"
|
|
)
|
|
(vvPair
|
|
variable "module_name"
|
|
value "ahbLite_tester"
|
|
)
|
|
(vvPair
|
|
variable "month"
|
|
value "avr."
|
|
)
|
|
(vvPair
|
|
variable "month_long"
|
|
value "avril"
|
|
)
|
|
(vvPair
|
|
variable "p"
|
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\..\\Libs\\AhbLite_test\\hds\\ahb@lite_tester\\interface"
|
|
)
|
|
(vvPair
|
|
variable "p_logical"
|
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\..\\Libs\\AhbLite_test\\hds\\ahbLite_tester\\interface"
|
|
)
|
|
(vvPair
|
|
variable "package_name"
|
|
value "<Undefined Variable>"
|
|
)
|
|
(vvPair
|
|
variable "project_name"
|
|
value "hds"
|
|
)
|
|
(vvPair
|
|
variable "series"
|
|
value "HDL Designer Series"
|
|
)
|
|
(vvPair
|
|
variable "task_HDSPath"
|
|
value "$HDS_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEBinPath"
|
|
value "$ISE_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEPath"
|
|
value "$SCRATCH_DIR\\$DESIGN_NAME\\$ISE_WORK_DIR"
|
|
)
|
|
(vvPair
|
|
variable "task_ModelSimPath"
|
|
value "$MODELSIM_HOME\\win32"
|
|
)
|
|
(vvPair
|
|
variable "this_ext"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "this_file"
|
|
value "interface"
|
|
)
|
|
(vvPair
|
|
variable "this_file_logical"
|
|
value "interface"
|
|
)
|
|
(vvPair
|
|
variable "time"
|
|
value "15:16:10"
|
|
)
|
|
(vvPair
|
|
variable "unit"
|
|
value "ahbLite_tester"
|
|
)
|
|
(vvPair
|
|
variable "user"
|
|
value "axel.amand"
|
|
)
|
|
(vvPair
|
|
variable "version"
|
|
value "2019.2 (Build 5)"
|
|
)
|
|
(vvPair
|
|
variable "view"
|
|
value "interface"
|
|
)
|
|
(vvPair
|
|
variable "year"
|
|
value "2023"
|
|
)
|
|
(vvPair
|
|
variable "yy"
|
|
value "23"
|
|
)
|
|
]
|
|
)
|
|
LanguageMgr "VhdlLangMgr"
|
|
uid 198,0
|
|
optionalChildren [
|
|
*97 (SymbolBody
|
|
uid 8,0
|
|
optionalChildren [
|
|
*98 (CptPort
|
|
uid 1201,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1202,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "34625,5250,35375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1203,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1204,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "34300,7000,35700,10800"
|
|
st "clock"
|
|
ju 2
|
|
blo "35500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1205,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,9200,63500,10000"
|
|
st "clock : OUT std_ulogic ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "clock"
|
|
t "std_ulogic"
|
|
o 1
|
|
suid 127,0
|
|
)
|
|
)
|
|
)
|
|
*99 (CptPort
|
|
uid 1206,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1207,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "134625,5250,135375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1208,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1209,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "134300,7000,135700,11500"
|
|
st "hAddr"
|
|
ju 2
|
|
blo "135500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1210,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,2000,77000,2800"
|
|
st "hAddr : IN unsigned (ahbAddressBitNb-1 DOWNTO 0) ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hAddr"
|
|
t "unsigned"
|
|
b "(ahbAddressBitNb-1 DOWNTO 0)"
|
|
o 2
|
|
suid 128,0
|
|
)
|
|
)
|
|
)
|
|
*100 (CptPort
|
|
uid 1211,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1212,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "60625,5250,61375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1213,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1214,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "60300,7000,61700,10500"
|
|
st "hClk"
|
|
ju 2
|
|
blo "61500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1215,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,2800,63500,3600"
|
|
st "hClk : IN std_uLogic ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hClk"
|
|
t "std_uLogic"
|
|
o 4
|
|
suid 129,0
|
|
)
|
|
)
|
|
)
|
|
*101 (CptPort
|
|
uid 1216,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1217,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "152625,5250,153375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1218,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1219,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "152300,7000,153700,18000"
|
|
st "hRDataPeriph1"
|
|
ju 2
|
|
blo "153500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1220,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,10000,80000,10800"
|
|
st "hRDataPeriph1 : OUT std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0) ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "hRDataPeriph1"
|
|
t "std_ulogic_vector"
|
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
|
o 8
|
|
suid 130,0
|
|
)
|
|
)
|
|
)
|
|
*102 (CptPort
|
|
uid 1221,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1222,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "142625,5250,143375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1223,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1224,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "142300,7000,143700,18000"
|
|
st "hRDataPeriph2"
|
|
ju 2
|
|
blo "143500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1225,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,10800,80000,11600"
|
|
st "hRDataPeriph2 : OUT std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0) ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "hRDataPeriph2"
|
|
t "std_ulogic_vector"
|
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
|
o 9
|
|
suid 131,0
|
|
)
|
|
)
|
|
)
|
|
*103 (CptPort
|
|
uid 1226,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1227,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "150625,5250,151375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1228,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1229,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "150300,7000,151700,18100"
|
|
st "hReadyPeriph1"
|
|
ju 2
|
|
blo "151500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1230,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,11600,63500,12400"
|
|
st "hReadyPeriph1 : OUT std_uLogic ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "hReadyPeriph1"
|
|
t "std_uLogic"
|
|
o 12
|
|
suid 132,0
|
|
)
|
|
)
|
|
)
|
|
*104 (CptPort
|
|
uid 1231,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1232,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "140625,5250,141375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1233,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1234,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "140300,7000,141700,18100"
|
|
st "hReadyPeriph2"
|
|
ju 2
|
|
blo "141500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1235,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,12400,63500,13200"
|
|
st "hReadyPeriph2 : OUT std_uLogic ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "hReadyPeriph2"
|
|
t "std_uLogic"
|
|
o 13
|
|
suid 133,0
|
|
)
|
|
)
|
|
)
|
|
*105 (CptPort
|
|
uid 1236,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1237,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "58625,5250,59375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1238,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1239,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "58300,7000,59700,13800"
|
|
st "hReset_n"
|
|
ju 2
|
|
blo "59500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1240,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,3600,63500,4400"
|
|
st "hReset_n : IN std_uLogic ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hReset_n"
|
|
t "std_uLogic"
|
|
o 15
|
|
suid 134,0
|
|
)
|
|
)
|
|
)
|
|
*106 (CptPort
|
|
uid 1241,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1242,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "148625,5250,149375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1243,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1244,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "148300,7000,149700,17300"
|
|
st "hRespPeriph1"
|
|
ju 2
|
|
blo "149500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1245,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,13200,63500,14000"
|
|
st "hRespPeriph1 : OUT std_uLogic ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "hRespPeriph1"
|
|
t "std_uLogic"
|
|
o 17
|
|
suid 135,0
|
|
)
|
|
)
|
|
)
|
|
*107 (CptPort
|
|
uid 1246,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1247,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "138625,5250,139375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1248,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1249,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "138300,7000,139700,17300"
|
|
st "hRespPeriph2"
|
|
ju 2
|
|
blo "139500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1250,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,14000,63500,14800"
|
|
st "hRespPeriph2 : OUT std_uLogic ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "hRespPeriph2"
|
|
t "std_uLogic"
|
|
o 18
|
|
suid 136,0
|
|
)
|
|
)
|
|
)
|
|
*108 (CptPort
|
|
uid 1251,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1252,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "154625,5250,155375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1253,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1254,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "154300,7000,155700,16100"
|
|
st "hSelPeriph1"
|
|
ju 2
|
|
blo "155500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1255,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,4400,63500,5200"
|
|
st "hSelPeriph1 : IN std_uLogic ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hSelPeriph1"
|
|
t "std_uLogic"
|
|
o 20
|
|
suid 137,0
|
|
)
|
|
)
|
|
)
|
|
*109 (CptPort
|
|
uid 1256,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1257,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "144625,5250,145375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1258,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1259,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "144300,7000,145700,16100"
|
|
st "hSelPeriph2"
|
|
ju 2
|
|
blo "145500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1260,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,5200,63500,6000"
|
|
st "hSelPeriph2 : IN std_uLogic ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hSelPeriph2"
|
|
t "std_uLogic"
|
|
o 21
|
|
suid 138,0
|
|
)
|
|
)
|
|
)
|
|
*110 (CptPort
|
|
uid 1261,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1262,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "130625,5250,131375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1263,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1264,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "130300,7000,131700,12100"
|
|
st "hTrans"
|
|
ju 2
|
|
blo "131500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1265,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,6000,80500,6800"
|
|
st "hTrans : IN std_ulogic_vector (ahbTransBitNb-1 DOWNTO 0) ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hTrans"
|
|
t "std_ulogic_vector"
|
|
b "(ahbTransBitNb-1 DOWNTO 0)"
|
|
o 24
|
|
suid 139,0
|
|
)
|
|
)
|
|
)
|
|
*111 (CptPort
|
|
uid 1266,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1267,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "132625,5250,133375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1268,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1269,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "132300,7000,133700,12900"
|
|
st "hWData"
|
|
ju 2
|
|
blo "133500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1270,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,6800,80000,7600"
|
|
st "hWData : IN std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0) ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hWData"
|
|
t "std_ulogic_vector"
|
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
|
o 25
|
|
suid 140,0
|
|
)
|
|
)
|
|
)
|
|
*112 (CptPort
|
|
uid 1271,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1272,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "128625,5250,129375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1273,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1274,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "128300,7000,129700,12000"
|
|
st "hWrite"
|
|
ju 2
|
|
blo "129500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1275,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,7600,63500,8400"
|
|
st "hWrite : IN std_uLogic ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hWrite"
|
|
t "std_uLogic"
|
|
o 26
|
|
suid 141,0
|
|
)
|
|
)
|
|
)
|
|
*113 (CptPort
|
|
uid 1276,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1277,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "36625,5250,37375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1278,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1279,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "36300,7000,37700,11100"
|
|
st "reset"
|
|
ju 2
|
|
blo "37500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1280,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,14800,63500,15600"
|
|
st "reset : OUT std_ulogic ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "reset"
|
|
t "std_ulogic"
|
|
o 27
|
|
suid 142,0
|
|
)
|
|
)
|
|
)
|
|
*114 (CptPort
|
|
uid 1281,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1282,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "22625,5250,23375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1283,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1284,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "22300,7000,23700,14500"
|
|
st "upAddress"
|
|
ju 2
|
|
blo "23500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1285,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,15600,77000,16400"
|
|
st "upAddress : OUT unsigned (ahbAddressBitNb-1 DOWNTO 0) ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "upAddress"
|
|
t "unsigned"
|
|
b "(ahbAddressBitNb-1 DOWNTO 0)"
|
|
o 28
|
|
suid 143,0
|
|
)
|
|
)
|
|
)
|
|
*115 (CptPort
|
|
uid 1286,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1287,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "26625,5250,27375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1288,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1289,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "26300,7000,27700,13700"
|
|
st "upDataIn"
|
|
ju 2
|
|
blo "27500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1290,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,8400,80000,9200"
|
|
st "upDataIn : IN std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0) ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "upDataIn"
|
|
t "std_ulogic_vector"
|
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
|
o 29
|
|
suid 144,0
|
|
)
|
|
)
|
|
)
|
|
*116 (CptPort
|
|
uid 1291,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1292,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "24625,5250,25375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1293,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1294,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "24300,7000,25700,14700"
|
|
st "upDataOut"
|
|
ju 2
|
|
blo "25500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1295,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,16400,80000,17200"
|
|
st "upDataOut : OUT std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0) ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "upDataOut"
|
|
t "std_ulogic_vector"
|
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
|
o 30
|
|
suid 145,0
|
|
)
|
|
)
|
|
)
|
|
*117 (CptPort
|
|
uid 1296,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1297,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "28625,5250,29375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1298,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1299,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "28300,7000,29700,17600"
|
|
st "upReadStrobe"
|
|
ju 2
|
|
blo "29500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1300,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,17200,63500,18000"
|
|
st "upReadStrobe : OUT std_uLogic ;
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "upReadStrobe"
|
|
t "std_uLogic"
|
|
o 31
|
|
suid 146,0
|
|
)
|
|
)
|
|
)
|
|
*118 (CptPort
|
|
uid 1301,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 1302,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "30625,5250,31375,6000"
|
|
)
|
|
tg (CPTG
|
|
uid 1303,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 1304,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "30300,7000,31700,17800"
|
|
st "upWriteStrobe"
|
|
ju 2
|
|
blo "31500,7000"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 1305,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,18000,62500,18800"
|
|
st "upWriteStrobe : OUT std_uLogic
|
|
"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "upWriteStrobe"
|
|
t "std_uLogic"
|
|
o 32
|
|
suid 147,0
|
|
)
|
|
)
|
|
)
|
|
]
|
|
shape (Rectangle
|
|
uid 9,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
lineColor "0,32896,0"
|
|
lineWidth 2
|
|
)
|
|
xt "15000,6000,163000,14000"
|
|
)
|
|
biTextGroup (BiTextGroup
|
|
uid 10,0
|
|
ps "CenterOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
first (Text
|
|
uid 11,0
|
|
va (VaSet
|
|
)
|
|
xt "84650,8800,92550,10000"
|
|
st "AhbLite_test"
|
|
blo "84650,9800"
|
|
)
|
|
second (Text
|
|
uid 12,0
|
|
va (VaSet
|
|
)
|
|
xt "84650,10000,93350,11200"
|
|
st "ahbLite_tester"
|
|
blo "84650,11000"
|
|
)
|
|
)
|
|
gi *119 (GenericInterface
|
|
uid 13,0
|
|
ps "CenterOffsetStrategy"
|
|
matrix (Matrix
|
|
uid 14,0
|
|
text (MLText
|
|
uid 15,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "54000,6000,70000,9200"
|
|
st "Generic Declarations
|
|
|
|
periph2BaseAddress natural
|
|
clockFrequency real "
|
|
)
|
|
header "Generic Declarations"
|
|
showHdrWhenContentsEmpty 1
|
|
)
|
|
elements [
|
|
(GiElement
|
|
name "periph2BaseAddress"
|
|
type "natural"
|
|
value ""
|
|
)
|
|
(GiElement
|
|
name "clockFrequency"
|
|
type "real"
|
|
value ""
|
|
)
|
|
]
|
|
)
|
|
portInstanceVisAsIs 1
|
|
portInstanceVis (PortSigDisplay
|
|
sTC 0
|
|
sF 0
|
|
)
|
|
portVis (PortSigDisplay
|
|
sTC 0
|
|
sF 0
|
|
)
|
|
)
|
|
*120 (Grouping
|
|
uid 16,0
|
|
optionalChildren [
|
|
*121 (CommentText
|
|
uid 18,0
|
|
shape (Rectangle
|
|
uid 19,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "36000,48000,53000,49000"
|
|
)
|
|
oxt "18000,70000,35000,71000"
|
|
text (MLText
|
|
uid 20,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
font "Arial,8,0"
|
|
)
|
|
xt "36200,48000,47600,49000"
|
|
st "
|
|
by %user on %dd %month %year
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1000
|
|
visibleWidth 17000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*122 (CommentText
|
|
uid 21,0
|
|
shape (Rectangle
|
|
uid 22,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "53000,44000,57000,45000"
|
|
)
|
|
oxt "35000,66000,39000,67000"
|
|
text (MLText
|
|
uid 23,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
font "Arial,8,0"
|
|
)
|
|
xt "53200,44000,56200,45000"
|
|
st "
|
|
Project:
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1000
|
|
visibleWidth 4000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*123 (CommentText
|
|
uid 24,0
|
|
shape (Rectangle
|
|
uid 25,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "36000,46000,53000,47000"
|
|
)
|
|
oxt "18000,68000,35000,69000"
|
|
text (MLText
|
|
uid 26,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
font "Arial,8,0"
|
|
)
|
|
xt "36200,46000,46200,47000"
|
|
st "
|
|
<enter diagram title here>
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1000
|
|
visibleWidth 17000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*124 (CommentText
|
|
uid 27,0
|
|
shape (Rectangle
|
|
uid 28,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "32000,46000,36000,47000"
|
|
)
|
|
oxt "14000,68000,18000,69000"
|
|
text (MLText
|
|
uid 29,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
font "Arial,8,0"
|
|
)
|
|
xt "32200,46000,34300,47000"
|
|
st "
|
|
Title:
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1000
|
|
visibleWidth 4000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*125 (CommentText
|
|
uid 30,0
|
|
shape (Rectangle
|
|
uid 31,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "53000,45000,73000,49000"
|
|
)
|
|
oxt "35000,67000,55000,71000"
|
|
text (MLText
|
|
uid 32,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
font "Arial,8,0"
|
|
)
|
|
xt "53200,45200,62600,46200"
|
|
st "
|
|
<enter comments here>
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 4000
|
|
visibleWidth 20000
|
|
)
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*126 (CommentText
|
|
uid 33,0
|
|
shape (Rectangle
|
|
uid 34,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "57000,44000,73000,45000"
|
|
)
|
|
oxt "39000,66000,55000,67000"
|
|
text (MLText
|
|
uid 35,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
font "Arial,8,0"
|
|
)
|
|
xt "57200,44000,58800,45000"
|
|
st "
|
|
%project_name
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1000
|
|
visibleWidth 16000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*127 (CommentText
|
|
uid 36,0
|
|
shape (Rectangle
|
|
uid 37,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "32000,44000,53000,46000"
|
|
)
|
|
oxt "14000,66000,35000,68000"
|
|
text (MLText
|
|
uid 38,0
|
|
va (VaSet
|
|
fg "32768,0,0"
|
|
)
|
|
xt "37350,44400,47650,45600"
|
|
st "
|
|
<company name>
|
|
"
|
|
ju 0
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 2000
|
|
visibleWidth 21000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*128 (CommentText
|
|
uid 39,0
|
|
shape (Rectangle
|
|
uid 40,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "32000,47000,36000,48000"
|
|
)
|
|
oxt "14000,69000,18000,70000"
|
|
text (MLText
|
|
uid 41,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
font "Arial,8,0"
|
|
)
|
|
xt "32200,47000,34300,48000"
|
|
st "
|
|
Path:
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1000
|
|
visibleWidth 4000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*129 (CommentText
|
|
uid 42,0
|
|
shape (Rectangle
|
|
uid 43,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "32000,48000,36000,49000"
|
|
)
|
|
oxt "14000,70000,18000,71000"
|
|
text (MLText
|
|
uid 44,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
font "Arial,8,0"
|
|
)
|
|
xt "32200,48000,34900,49000"
|
|
st "
|
|
Edited:
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1000
|
|
visibleWidth 4000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
*130 (CommentText
|
|
uid 45,0
|
|
shape (Rectangle
|
|
uid 46,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "36000,47000,53000,48000"
|
|
)
|
|
oxt "18000,69000,35000,70000"
|
|
text (MLText
|
|
uid 47,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
|
|
font "Arial,8,0"
|
|
)
|
|
xt "36200,47000,49500,48000"
|
|
st "
|
|
%library/%unit/%view
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1000
|
|
visibleWidth 17000
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
titleBlock 1
|
|
)
|
|
]
|
|
shape (GroupingShape
|
|
uid 17,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineStyle 2
|
|
lineWidth 2
|
|
)
|
|
xt "32000,44000,73000,49000"
|
|
)
|
|
oxt "14000,66000,55000,71000"
|
|
)
|
|
]
|
|
bg "65535,65535,65535"
|
|
grid (Grid
|
|
origin "0,0"
|
|
isVisible 1
|
|
isActive 1
|
|
xSpacing 1000
|
|
xySpacing 1000
|
|
xShown 1
|
|
yShown 1
|
|
color "65535,0,0"
|
|
)
|
|
packageList *131 (PackageList
|
|
uid 48,0
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*132 (Text
|
|
uid 49,0
|
|
va (VaSet
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "0,0,6900,1000"
|
|
st "Package List"
|
|
blo "0,800"
|
|
)
|
|
*133 (MLText
|
|
uid 50,0
|
|
va (VaSet
|
|
)
|
|
xt "0,1000,17500,7000"
|
|
st "LIBRARY ieee;
|
|
USE ieee.std_logic_1164.all;
|
|
USE ieee.numeric_std.all;
|
|
LIBRARY AhbLite;
|
|
USE AhbLite.ahbLite.all;"
|
|
tm "PackageList"
|
|
)
|
|
]
|
|
)
|
|
windowSize "0,0,1017,690"
|
|
viewArea "-500,-500,71299,48094"
|
|
cachedDiagramExtent "0,0,163000,49000"
|
|
hasePageBreakOrigin 1
|
|
pageBreakOrigin "0,0"
|
|
defaultCommentText (CommentText
|
|
shape (Rectangle
|
|
layer 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
lineColor "0,0,32768"
|
|
)
|
|
xt "0,0,15000,5000"
|
|
)
|
|
text (MLText
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
)
|
|
xt "200,200,3200,1400"
|
|
st "
|
|
Text
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 4600
|
|
visibleWidth 14600
|
|
)
|
|
)
|
|
defaultRequirementText (RequirementText
|
|
shape (ZoomableIcon
|
|
layer 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "59904,39936,65280"
|
|
lineColor "0,0,32768"
|
|
)
|
|
xt "0,0,1500,1750"
|
|
iconName "reqTracerRequirement.bmp"
|
|
iconMaskName "reqTracerRequirement.msk"
|
|
)
|
|
autoResize 1
|
|
text (MLText
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
font "arial,8,0"
|
|
)
|
|
xt "500,2150,1400,3150"
|
|
st "
|
|
Text
|
|
"
|
|
tm "RequirementText"
|
|
wrapOption 3
|
|
visibleHeight 1350
|
|
visibleWidth 1100
|
|
)
|
|
)
|
|
defaultPanel (Panel
|
|
shape (RectFrame
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineColor "32768,0,0"
|
|
lineWidth 2
|
|
)
|
|
xt "0,0,20000,20000"
|
|
)
|
|
title (TextAssociate
|
|
ps "TopLeftStrategy"
|
|
text (Text
|
|
va (VaSet
|
|
font "Courier New,9,0"
|
|
)
|
|
xt "1000,1000,4500,2200"
|
|
st "Panel0"
|
|
blo "1000,1900"
|
|
tm "PanelText"
|
|
)
|
|
)
|
|
)
|
|
parentGraphicsRef (HdmGraphicsRef
|
|
libraryName "AhbLite_test"
|
|
entityName "ahbLite_tb"
|
|
viewName "struct.bd"
|
|
)
|
|
defaultSymbolBody (SymbolBody
|
|
shape (Rectangle
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
lineColor "0,32896,0"
|
|
lineWidth 2
|
|
)
|
|
xt "15000,6000,55000,26000"
|
|
)
|
|
biTextGroup (BiTextGroup
|
|
ps "CenterOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
first (Text
|
|
va (VaSet
|
|
)
|
|
xt "32800,15000,37200,16000"
|
|
st "<library>"
|
|
blo "32800,15800"
|
|
)
|
|
second (Text
|
|
va (VaSet
|
|
)
|
|
xt "32800,16000,36000,17000"
|
|
st "<cell>"
|
|
blo "32800,16800"
|
|
)
|
|
)
|
|
gi *134 (GenericInterface
|
|
ps "CenterOffsetStrategy"
|
|
matrix (Matrix
|
|
text (MLText
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,12000,11500,12800"
|
|
st "Generic Declarations"
|
|
)
|
|
header "Generic Declarations"
|
|
showHdrWhenContentsEmpty 1
|
|
)
|
|
elements [
|
|
]
|
|
)
|
|
portInstanceVisAsIs 1
|
|
)
|
|
defaultCptPort (CptPort
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "0,0,750,750"
|
|
)
|
|
tg (CPTG
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "0,750,2900,2150"
|
|
st "In0"
|
|
blo "0,1950"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "In0"
|
|
t "std_logic_vector"
|
|
b "(15 DOWNTO 0)"
|
|
o 0
|
|
)
|
|
)
|
|
)
|
|
defaultCptPortBuffer (CptPort
|
|
ps "OnEdgeStrategy"
|
|
shape (Diamond
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
bg "0,0,0"
|
|
)
|
|
xt "0,0,750,750"
|
|
)
|
|
tg (CPTG
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "0,750,5300,2150"
|
|
st "Buffer0"
|
|
blo "0,1950"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
m 3
|
|
decl (Decl
|
|
n "Buffer0"
|
|
t "std_logic_vector"
|
|
b "(15 DOWNTO 0)"
|
|
o 0
|
|
)
|
|
)
|
|
)
|
|
DeclarativeBlock *135 (SymDeclBlock
|
|
uid 1,0
|
|
stg "SymDeclLayoutStrategy"
|
|
declLabel (Text
|
|
uid 2,0
|
|
va (VaSet
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "42000,0,49000,1000"
|
|
st "Declarations"
|
|
blo "42000,800"
|
|
)
|
|
portLabel (Text
|
|
uid 3,0
|
|
va (VaSet
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "42000,1000,45400,2000"
|
|
st "Ports:"
|
|
blo "42000,1800"
|
|
)
|
|
externalLabel (Text
|
|
uid 4,0
|
|
va (VaSet
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "42000,18800,45000,19800"
|
|
st "User:"
|
|
blo "42000,19600"
|
|
)
|
|
internalLabel (Text
|
|
uid 6,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "42000,0,49600,1000"
|
|
st "Internal User:"
|
|
blo "42000,800"
|
|
)
|
|
externalText (MLText
|
|
uid 5,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "44000,19800,44000,19800"
|
|
tm "SyDeclarativeTextMgr"
|
|
)
|
|
internalText (MLText
|
|
uid 7,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "42000,0,42000,0"
|
|
tm "SyDeclarativeTextMgr"
|
|
)
|
|
)
|
|
lastUid 1347,0
|
|
activeModelName "Symbol:GEN"
|
|
)
|