2090 lines
26 KiB
Plaintext
2090 lines
26 KiB
Plaintext
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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(DmPackageRef
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library "AhbLite"
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unitName "ahbLite"
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)
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]
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libraryRefs [
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"ieee"
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"AhbLite"
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]
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)
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version "24.1"
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appVersion "2009.2 (Build 10)"
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model (Symbol
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commonDM (CommonDM
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ldm (LogicalDM
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suid 2067,0
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usingSuid 1
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emptyRow *1 (LEmptyRow
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)
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uid 320,0
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optionalChildren [
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*2 (RefLabelRowHdr
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)
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*3 (TitleRowHdr
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)
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*4 (FilterRowHdr
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)
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*5 (RefLabelColHdr
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tm "RefLabelColHdrMgr"
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)
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*6 (RowExpandColHdr
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tm "RowExpandColHdrMgr"
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)
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*7 (GroupColHdr
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tm "GroupColHdrMgr"
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)
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*8 (NameColHdr
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tm "NameColHdrMgr"
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)
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*9 (ModeColHdr
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tm "ModeColHdrMgr"
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)
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*10 (TypeColHdr
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tm "TypeColHdrMgr"
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)
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*11 (BoundsColHdr
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tm "BoundsColHdrMgr"
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)
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*12 (InitColHdr
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tm "InitColHdrMgr"
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)
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*13 (EolColHdr
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tm "EolColHdrMgr"
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)
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|
*14 (LogPort
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port (LogicalPort
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decl (Decl
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n "hAddr"
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t "unsigned"
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b "( ahbAddressBitNb-1 DOWNTO 0 )"
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o 1
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suid 2051,0
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)
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)
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uid 2524,0
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)
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*15 (LogPort
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port (LogicalPort
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decl (Decl
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n "hWData"
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t "std_ulogic_vector"
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b "(ahbDataBitNb-1 DOWNTO 0)"
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o 3
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suid 2053,0
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)
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)
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uid 2526,0
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)
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*16 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "hRData"
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t "std_ulogic_vector"
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b "(ahbDataBitNb-1 DOWNTO 0)"
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o 6
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suid 2054,0
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)
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)
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uid 2528,0
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)
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*17 (LogPort
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port (LogicalPort
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decl (Decl
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n "hWrite"
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t "std_uLogic"
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o 4
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suid 2055,0
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)
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)
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uid 2530,0
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)
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*18 (LogPort
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port (LogicalPort
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|
decl (Decl
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n "hTrans"
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t "std_ulogic_vector"
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|
b "(ahbTransBitNb-1 DOWNTO 0)"
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o 2
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suid 2059,0
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)
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)
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|
uid 2538,0
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)
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|
*19 (LogPort
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|
port (LogicalPort
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|
m 1
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|
decl (Decl
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|
n "hReady"
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|
t "std_uLogic"
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o 7
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suid 2061,0
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)
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)
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uid 2542,0
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)
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*20 (LogPort
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port (LogicalPort
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m 1
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|
decl (Decl
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|
n "hResp"
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t "std_uLogic"
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o 9
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suid 2062,0
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)
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)
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uid 2544,0
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)
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*21 (LogPort
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port (LogicalPort
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decl (Decl
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n "hClk"
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t "std_uLogic"
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o 5
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suid 2063,0
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)
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)
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uid 2546,0
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)
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*22 (LogPort
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port (LogicalPort
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decl (Decl
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n "hReset_n"
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t "std_uLogic"
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o 8
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suid 2064,0
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)
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)
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uid 2548,0
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)
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*23 (LogPort
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port (LogicalPort
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|
m 1
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decl (Decl
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|
n "TxD"
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t "std_ulogic"
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o 10
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suid 2065,0
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)
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)
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uid 2656,0
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)
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*24 (LogPort
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port (LogicalPort
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|
decl (Decl
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n "hSel"
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|
t "std_uLogic"
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o 11
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suid 2066,0
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)
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)
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|
uid 2697,0
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)
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|
*25 (LogPort
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|
port (LogicalPort
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|
decl (Decl
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|
n "RxD"
|
|
t "std_ulogic"
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|
o 12
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suid 2067,0
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)
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)
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|
uid 2844,0
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)
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]
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)
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pdm (PhysicalDM
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displayShortBounds 1
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editShortBounds 1
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uid 333,0
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optionalChildren [
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*26 (Sheet
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sheetRow (SheetRow
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headerVa (MVa
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cellColor "49152,49152,49152"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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cellVa (MVa
|
|
cellColor "65535,65535,65535"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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groupVa (MVa
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cellColor "39936,56832,65280"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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emptyMRCItem *27 (MRCItem
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litem &1
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pos 12
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dimension 20
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)
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uid 254,0
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optionalChildren [
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*28 (MRCItem
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litem &2
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pos 0
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dimension 20
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uid 257,0
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)
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*29 (MRCItem
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litem &3
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pos 1
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dimension 23
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uid 259,0
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)
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*30 (MRCItem
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litem &4
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pos 2
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hidden 1
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dimension 20
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uid 261,0
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)
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*31 (MRCItem
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litem &14
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pos 0
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dimension 20
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uid 2525,0
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)
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*32 (MRCItem
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litem &15
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pos 1
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dimension 20
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uid 2527,0
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)
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*33 (MRCItem
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litem &16
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pos 2
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dimension 20
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uid 2529,0
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)
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*34 (MRCItem
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litem &17
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pos 3
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dimension 20
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uid 2531,0
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)
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*35 (MRCItem
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litem &18
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pos 4
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dimension 20
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uid 2539,0
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)
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*36 (MRCItem
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litem &19
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pos 5
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dimension 20
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uid 2543,0
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)
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*37 (MRCItem
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litem &20
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pos 6
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dimension 20
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uid 2545,0
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)
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*38 (MRCItem
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litem &21
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pos 7
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dimension 20
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uid 2547,0
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)
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*39 (MRCItem
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litem &22
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pos 8
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dimension 20
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uid 2549,0
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)
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*40 (MRCItem
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litem &23
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pos 9
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dimension 20
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uid 2657,0
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)
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*41 (MRCItem
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litem &24
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pos 10
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dimension 20
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uid 2698,0
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)
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*42 (MRCItem
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litem &25
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pos 11
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dimension 20
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uid 2845,0
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)
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]
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)
|
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sheetCol (SheetCol
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propVa (MVa
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cellColor "0,49152,49152"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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textAngle 90
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)
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uid 255,0
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optionalChildren [
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*43 (MRCItem
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litem &5
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pos 0
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dimension 20
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|
uid 263,0
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)
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*44 (MRCItem
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litem &7
|
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pos 1
|
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dimension 50
|
|
uid 267,0
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)
|
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*45 (MRCItem
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litem &8
|
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pos 2
|
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dimension 100
|
|
uid 269,0
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)
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*46 (MRCItem
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litem &9
|
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pos 3
|
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dimension 50
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|
uid 271,0
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)
|
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*47 (MRCItem
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litem &10
|
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pos 4
|
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dimension 100
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|
uid 273,0
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)
|
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*48 (MRCItem
|
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litem &11
|
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pos 5
|
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dimension 100
|
|
uid 275,0
|
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)
|
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*49 (MRCItem
|
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litem &12
|
|
pos 6
|
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dimension 50
|
|
uid 277,0
|
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)
|
|
*50 (MRCItem
|
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litem &13
|
|
pos 7
|
|
dimension 80
|
|
uid 279,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 4
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 253,0
|
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vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 319,0
|
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)
|
|
genericsCommonDM (CommonDM
|
|
ldm (LogicalDM
|
|
emptyRow *51 (LEmptyRow
|
|
)
|
|
uid 335,0
|
|
optionalChildren [
|
|
*52 (RefLabelRowHdr
|
|
)
|
|
*53 (TitleRowHdr
|
|
)
|
|
*54 (FilterRowHdr
|
|
)
|
|
*55 (RefLabelColHdr
|
|
tm "RefLabelColHdrMgr"
|
|
)
|
|
*56 (RowExpandColHdr
|
|
tm "RowExpandColHdrMgr"
|
|
)
|
|
*57 (GroupColHdr
|
|
tm "GroupColHdrMgr"
|
|
)
|
|
*58 (NameColHdr
|
|
tm "GenericNameColHdrMgr"
|
|
)
|
|
*59 (TypeColHdr
|
|
tm "GenericTypeColHdrMgr"
|
|
)
|
|
*60 (InitColHdr
|
|
tm "GenericValueColHdrMgr"
|
|
)
|
|
*61 (PragmaColHdr
|
|
tm "GenericPragmaColHdrMgr"
|
|
)
|
|
*62 (EolColHdr
|
|
tm "GenericEolColHdrMgr"
|
|
)
|
|
*63 (LogGeneric
|
|
generic (GiElement
|
|
name "txFifoDepth"
|
|
type "positive"
|
|
value "8"
|
|
)
|
|
uid 2658,0
|
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)
|
|
*64 (LogGeneric
|
|
generic (GiElement
|
|
name "rxFifoDepth"
|
|
type "positive"
|
|
value "1"
|
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)
|
|
uid 2791,0
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)
|
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]
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)
|
|
pdm (PhysicalDM
|
|
uid 336,0
|
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optionalChildren [
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*65 (Sheet
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|
sheetRow (SheetRow
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|
headerVa (MVa
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|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
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|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
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font "Tahoma,10,0"
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)
|
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groupVa (MVa
|
|
cellColor "39936,56832,65280"
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fontColor "0,0,0"
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font "Tahoma,10,0"
|
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)
|
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emptyMRCItem *66 (MRCItem
|
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litem &51
|
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pos 2
|
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dimension 20
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)
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uid 293,0
|
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optionalChildren [
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*67 (MRCItem
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litem &52
|
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pos 0
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dimension 20
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uid 296,0
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)
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*68 (MRCItem
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litem &53
|
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pos 1
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dimension 23
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uid 298,0
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)
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*69 (MRCItem
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litem &54
|
|
pos 2
|
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hidden 1
|
|
dimension 20
|
|
uid 300,0
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)
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*70 (MRCItem
|
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litem &63
|
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pos 0
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dimension 20
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uid 2659,0
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)
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*71 (MRCItem
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litem &64
|
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pos 1
|
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dimension 20
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|
uid 2792,0
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)
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]
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)
|
|
sheetCol (SheetCol
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|
propVa (MVa
|
|
cellColor "0,49152,49152"
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|
fontColor "0,0,0"
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font "Tahoma,10,0"
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textAngle 90
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)
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|
uid 294,0
|
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optionalChildren [
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*72 (MRCItem
|
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litem &55
|
|
pos 0
|
|
dimension 20
|
|
uid 302,0
|
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)
|
|
*73 (MRCItem
|
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litem &57
|
|
pos 1
|
|
dimension 50
|
|
uid 306,0
|
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)
|
|
*74 (MRCItem
|
|
litem &58
|
|
pos 2
|
|
dimension 199
|
|
uid 308,0
|
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)
|
|
*75 (MRCItem
|
|
litem &59
|
|
pos 3
|
|
dimension 100
|
|
uid 310,0
|
|
)
|
|
*76 (MRCItem
|
|
litem &60
|
|
pos 4
|
|
dimension 50
|
|
uid 312,0
|
|
)
|
|
*77 (MRCItem
|
|
litem &61
|
|
pos 5
|
|
dimension 50
|
|
uid 314,0
|
|
)
|
|
*78 (MRCItem
|
|
litem &62
|
|
pos 6
|
|
dimension 309
|
|
uid 316,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 3
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 292,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 334,0
|
|
type 1
|
|
)
|
|
VExpander (VariableExpander
|
|
vvMap [
|
|
(vvPair
|
|
variable " "
|
|
value " "
|
|
)
|
|
(vvPair
|
|
variable "HDLDir"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hdl"
|
|
)
|
|
(vvPair
|
|
variable "HDSDir"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds"
|
|
)
|
|
(vvPair
|
|
variable "SideDataDesignDir"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds\\ahb@uart\\symbol.sb.info"
|
|
)
|
|
(vvPair
|
|
variable "SideDataUserDir"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds\\ahb@uart\\symbol.sb.user"
|
|
)
|
|
(vvPair
|
|
variable "SourceDir"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds"
|
|
)
|
|
(vvPair
|
|
variable "appl"
|
|
value "HDL Designer"
|
|
)
|
|
(vvPair
|
|
variable "arch_name"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "asm_file"
|
|
value "nanoTest.asm"
|
|
)
|
|
(vvPair
|
|
variable "concat_file"
|
|
value "concatenated"
|
|
)
|
|
(vvPair
|
|
variable "config"
|
|
value "%(unit)_%(view)_config"
|
|
)
|
|
(vvPair
|
|
variable "d"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds\\ahb@uart"
|
|
)
|
|
(vvPair
|
|
variable "d_logical"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds\\ahbUart"
|
|
)
|
|
(vvPair
|
|
variable "date"
|
|
value "03.03.2015"
|
|
)
|
|
(vvPair
|
|
variable "day"
|
|
value "mar."
|
|
)
|
|
(vvPair
|
|
variable "day_long"
|
|
value "mardi"
|
|
)
|
|
(vvPair
|
|
variable "dd"
|
|
value "03"
|
|
)
|
|
(vvPair
|
|
variable "designName"
|
|
value "$DESIGN_NAME"
|
|
)
|
|
(vvPair
|
|
variable "entity_name"
|
|
value "ahbUart"
|
|
)
|
|
(vvPair
|
|
variable "ext"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "f"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "f_logical"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "f_noext"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "group"
|
|
value "UNKNOWN"
|
|
)
|
|
(vvPair
|
|
variable "host"
|
|
value "WE3673"
|
|
)
|
|
(vvPair
|
|
variable "language"
|
|
value "VHDL"
|
|
)
|
|
(vvPair
|
|
variable "library"
|
|
value "AhbLiteComponents"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_Concatenation"
|
|
value "U:/ELN_Board/Synthesis"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_Generic_1_file"
|
|
value "U:\\ELN_Board\\Synthesis"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_HdsLintPlugin"
|
|
value "$HDS_PROJECT_DIR/../NanoBlaze/designcheck"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_ModelSim"
|
|
value "D:\\Users\\ELN_labs\\VHDL_comp"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_ModelSimCompiler"
|
|
value "$SCRATCH_DIR/Libs/AhbLiteComponents/work"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_SpyGlass"
|
|
value "U:\\ELN_Board\\Synthesis"
|
|
)
|
|
(vvPair
|
|
variable "mm"
|
|
value "03"
|
|
)
|
|
(vvPair
|
|
variable "module_name"
|
|
value "ahbUart"
|
|
)
|
|
(vvPair
|
|
variable "month"
|
|
value "mars"
|
|
)
|
|
(vvPair
|
|
variable "month_long"
|
|
value "mars"
|
|
)
|
|
(vvPair
|
|
variable "p"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds\\ahb@uart\\symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "p_logical"
|
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds\\ahbUart\\symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "package_name"
|
|
value "<Undefined Variable>"
|
|
)
|
|
(vvPair
|
|
variable "project_name"
|
|
value "hds-beamer"
|
|
)
|
|
(vvPair
|
|
variable "series"
|
|
value "HDL Designer Series"
|
|
)
|
|
(vvPair
|
|
variable "task_ADMS"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_DesignCompilerPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_HDSPath"
|
|
value "$HDS_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEBinPath"
|
|
value "$ISE_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEPath"
|
|
value "$ISE_SCRATCH_WORK_DIR"
|
|
)
|
|
(vvPair
|
|
variable "task_LeonardoPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_ModelSimPath"
|
|
value "$MODELSIM_HOME\\win32"
|
|
)
|
|
(vvPair
|
|
variable "task_NC"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_NC-SimPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_PrecisionRTLPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_QuestaSimPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_VCSPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "this_ext"
|
|
value "sb"
|
|
)
|
|
(vvPair
|
|
variable "this_file"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "this_file_logical"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "time"
|
|
value "08:32:23"
|
|
)
|
|
(vvPair
|
|
variable "unit"
|
|
value "ahbUart"
|
|
)
|
|
(vvPair
|
|
variable "user"
|
|
value "francois"
|
|
)
|
|
(vvPair
|
|
variable "version"
|
|
value "2009.2 (Build 10)"
|
|
)
|
|
(vvPair
|
|
variable "view"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "year"
|
|
value "2015"
|
|
)
|
|
(vvPair
|
|
variable "yy"
|
|
value "15"
|
|
)
|
|
]
|
|
)
|
|
LanguageMgr "VhdlLangMgr"
|
|
uid 51,0
|
|
optionalChildren [
|
|
*79 (SymbolBody
|
|
uid 8,0
|
|
optionalChildren [
|
|
*80 (CptPort
|
|
uid 2452,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2683,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "46250,19625,47000,20375"
|
|
)
|
|
tg (CPTG
|
|
uid 2454,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2455,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "48000,19300,52500,20700"
|
|
st "hAddr"
|
|
blo "48000,20500"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 2456,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "2000,12200,33500,13000"
|
|
st "hAddr : IN unsigned ( ahbAddressBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hAddr"
|
|
t "unsigned"
|
|
b "( ahbAddressBitNb-1 DOWNTO 0 )"
|
|
o 1
|
|
suid 2051,0
|
|
)
|
|
)
|
|
)
|
|
*81 (CptPort
|
|
uid 2464,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2684,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "46250,21625,47000,22375"
|
|
)
|
|
tg (CPTG
|
|
uid 2466,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2467,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "48000,21300,53900,22700"
|
|
st "hWData"
|
|
blo "48000,22500"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 2468,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "2000,16200,35500,17000"
|
|
st "hWData : IN std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hWData"
|
|
t "std_ulogic_vector"
|
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
|
o 3
|
|
suid 2053,0
|
|
)
|
|
)
|
|
)
|
|
*82 (CptPort
|
|
uid 2469,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2685,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "46250,29625,47000,30375"
|
|
)
|
|
tg (CPTG
|
|
uid 2471,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2472,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "48000,29300,53400,30700"
|
|
st "hRData"
|
|
blo "48000,30500"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 2473,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "2000,18600,35500,19400"
|
|
st "hRData : OUT std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "hRData"
|
|
t "std_ulogic_vector"
|
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
|
o 6
|
|
suid 2054,0
|
|
)
|
|
)
|
|
)
|
|
*83 (CptPort
|
|
uid 2474,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2686,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "46250,25625,47000,26375"
|
|
)
|
|
tg (CPTG
|
|
uid 2476,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2477,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "48000,25300,53000,26700"
|
|
st "hWrite"
|
|
blo "48000,26500"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 2478,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "2000,17000,19000,17800"
|
|
st "hWrite : IN std_uLogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hWrite"
|
|
t "std_uLogic"
|
|
o 4
|
|
suid 2055,0
|
|
)
|
|
)
|
|
)
|
|
*84 (CptPort
|
|
uid 2494,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2687,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "46250,23625,47000,24375"
|
|
)
|
|
tg (CPTG
|
|
uid 2496,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2497,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "48000,23300,53100,24700"
|
|
st "hTrans"
|
|
blo "48000,24500"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 2498,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "2000,15400,36000,16200"
|
|
st "hTrans : IN std_ulogic_vector (ahbTransBitNb-1 DOWNTO 0) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hTrans"
|
|
t "std_ulogic_vector"
|
|
b "(ahbTransBitNb-1 DOWNTO 0)"
|
|
o 2
|
|
suid 2059,0
|
|
)
|
|
)
|
|
)
|
|
*85 (CptPort
|
|
uid 2504,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2688,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "46250,31625,47000,32375"
|
|
)
|
|
tg (CPTG
|
|
uid 2506,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2507,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "48000,31300,53500,32700"
|
|
st "hReady"
|
|
blo "48000,32500"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 2508,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "2000,19400,19000,20200"
|
|
st "hReady : OUT std_uLogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "hReady"
|
|
t "std_uLogic"
|
|
o 7
|
|
suid 2061,0
|
|
)
|
|
)
|
|
)
|
|
*86 (CptPort
|
|
uid 2509,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2689,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "46250,33625,47000,34375"
|
|
)
|
|
tg (CPTG
|
|
uid 2511,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2512,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "48000,33300,52700,34700"
|
|
st "hResp"
|
|
blo "48000,34500"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 2513,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "2000,20200,18000,21000"
|
|
st "hResp : OUT std_uLogic "
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "hResp"
|
|
t "std_uLogic"
|
|
o 9
|
|
suid 2062,0
|
|
)
|
|
)
|
|
)
|
|
*87 (CptPort
|
|
uid 2514,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2690,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "46250,37625,47000,38375"
|
|
)
|
|
tg (CPTG
|
|
uid 2516,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2517,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "48000,37300,51500,38700"
|
|
st "hClk"
|
|
blo "48000,38500"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 2518,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "2000,13000,19000,13800"
|
|
st "hClk : IN std_uLogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hClk"
|
|
t "std_uLogic"
|
|
o 5
|
|
suid 2063,0
|
|
)
|
|
)
|
|
)
|
|
*88 (CptPort
|
|
uid 2519,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2691,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "46250,39625,47000,40375"
|
|
)
|
|
tg (CPTG
|
|
uid 2521,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2522,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "48000,39300,54800,40700"
|
|
st "hReset_n"
|
|
blo "48000,40500"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 2523,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "2000,13800,19000,14600"
|
|
st "hReset_n : IN std_uLogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hReset_n"
|
|
t "std_uLogic"
|
|
o 8
|
|
suid 2064,0
|
|
)
|
|
)
|
|
)
|
|
*89 (CptPort
|
|
uid 2651,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2652,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "63000,19625,63750,20375"
|
|
)
|
|
tg (CPTG
|
|
uid 2653,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2654,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "58900,19300,62000,20700"
|
|
st "TxD"
|
|
ju 2
|
|
blo "62000,20500"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
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xt "15000,6000,47000,26000"
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)
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biTextGroup (BiTextGroup
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ps "CenterOffsetStrategy"
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stg "VerticalLayoutStrategy"
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first (Text
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va (VaSet
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)
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xt "29100,14700,32600,15700"
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st "<library>"
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blo "29100,15500"
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)
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second (Text
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va (VaSet
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xt "29100,15700,31700,16700"
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st "<cell>"
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blo "29100,16500"
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)
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)
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gi *108 (GenericInterface
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ps "CenterOffsetStrategy"
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matrix (Matrix
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text (MLText
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va (VaSet
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isHidden 1
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)
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xt "0,12000,0,12000"
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)
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header "Generic Declarations"
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)
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elements [
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]
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)
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portInstanceVis (PortSigDisplay
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sT 1
|
|
sIVOD 1
|
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)
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)
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|
defaultCptPort (CptPort
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ps "OnEdgeStrategy"
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|
shape (Triangle
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ro 90
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va (VaSet
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vasetType 1
|
|
fg "0,65535,0"
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)
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xt "0,0,750,750"
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)
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tg (CPTG
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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f (Text
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va (VaSet
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font "Verdana,12,0"
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)
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xt "0,750,2900,2150"
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st "In0"
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blo "0,1950"
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tm "CptPortNameMgr"
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)
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)
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dt (MLText
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va (VaSet
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font "Courier New,8,0"
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)
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)
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thePort (LogicalPort
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decl (Decl
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n "In0"
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t "unsigned"
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b "(15 DOWNTO 0)"
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)
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)
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)
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defaultCptPortBuffer (CptPort
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ps "OnEdgeStrategy"
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shape (Diamond
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va (VaSet
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vasetType 1
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)
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tg (CPTG
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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va (VaSet
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)
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st "Buffer0"
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blo "0,1950"
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tm "CptPortNameMgr"
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)
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dt (MLText
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va (VaSet
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font "Courier New,8,0"
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)
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)
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thePort (LogicalPort
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m 3
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|
decl (Decl
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n "Buffer0"
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t "unsigned"
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b "(15 DOWNTO 0)"
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o 0
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)
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)
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)
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DeclarativeBlock *109 (SymDeclBlock
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uid 1,0
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stg "SymDeclLayoutStrategy"
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declLabel (Text
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uid 2,0
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va (VaSet
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font "Arial,8,1"
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)
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xt "0,9400,5400,10400"
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blo "0,10200"
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)
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portLabel (Text
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uid 3,0
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va (VaSet
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font "Arial,8,1"
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)
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xt "0,10400,2700,11400"
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st "Ports:"
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|
blo "0,11200"
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)
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externalLabel (Text
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uid 4,0
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va (VaSet
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font "Arial,8,1"
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)
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xt "0,21000,2400,22000"
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st "User:"
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blo "0,21800"
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)
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internalLabel (Text
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uid 6,0
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va (VaSet
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isHidden 1
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font "Arial,8,1"
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)
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|
xt "0,9400,5800,10400"
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st "Internal User:"
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blo "0,10200"
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)
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externalText (MLText
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uid 5,0
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va (VaSet
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font "Courier New,8,0"
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)
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xt "2000,22000,2000,22000"
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tm "SyDeclarativeTextMgr"
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)
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internalText (MLText
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uid 7,0
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va (VaSet
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isHidden 1
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font "Courier New,8,0"
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)
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xt "0,9400,0,9400"
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tm "SyDeclarativeTextMgr"
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)
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)
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|
lastUid 2869,0
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OkToSyncGenericsOnLoad 1
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activeModelName "Symbol"
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)
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