7 lines
		
	
	
		
			174 B
		
	
	
	
		
			VHDL
		
	
	
	
	
	
			
		
		
	
	
			7 lines
		
	
	
		
			174 B
		
	
	
	
		
			VHDL
		
	
	
	
	
	
| ARCHITECTURE studentVersion OF periphControlReg IS
 | |
| BEGIN
 | |
|   run               <= '0';
 | |
|   updatePattern     <= '0';
 | |
|   interpolateLinear <= '0';
 | |
| END ARCHITECTURE studentVersion;
 |