7 lines
		
	
	
		
			143 B
		
	
	
	
		
			VHDL
		
	
	
	
	
	
			
		
		
	
	
			7 lines
		
	
	
		
			143 B
		
	
	
	
		
			VHDL
		
	
	
	
	
	
| ARCHITECTURE studentVersion OF blockRAMControl IS
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| BEGIN
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|   cntIncr <= '0';
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|   memWr   <= '0';
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|   memEn   <= '0';
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| END ARCHITECTURE studentVersion;
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