add square signal
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| -- VHDL Entity WaveformGenerator.sawtoothGen.symbol | ||||
| -- | ||||
| -- Created: | ||||
| --          by - francois.francois (Aphelia) | ||||
| --          at - 08:02:49 03/11/19 | ||||
| -- | ||||
| -- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5) | ||||
| -- | ||||
| LIBRARY ieee; | ||||
|   USE ieee.std_logic_1164.all; | ||||
|   USE ieee.numeric_std.all; | ||||
|  | ||||
| ENTITY sawtoothGen IS | ||||
|     GENERIC(  | ||||
|         bitNb : positive := 16 | ||||
|     ); | ||||
|     PORT(  | ||||
|         sawtooth : OUT    unsigned (bitNb-1 DOWNTO 0); | ||||
|         clock    : IN     std_ulogic; | ||||
|         reset    : IN     std_ulogic; | ||||
|         step     : IN     unsigned (bitNb-1 DOWNTO 0); | ||||
|         en       : IN     std_ulogic | ||||
|     ); | ||||
|  | ||||
| -- Declarations | ||||
|  | ||||
| END sawtoothGen ; | ||||
|  | ||||
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