add square signal

01-WaveformGenerator/WaveformGenerator/hdl/lowpass_entity.vhg

@@ -0,0 +1,28 @@
+-- VHDL Entity WaveformGenerator.lowpass.symbol
+--
+-- Created:
+--          by - francois.francois (Aphelia)
+--          at - 08:02:49 03/11/19
+--
+-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
+--
+LIBRARY ieee;
+  USE ieee.std_logic_1164.all;
+  USE ieee.numeric_std.all;
+
+ENTITY lowpass IS
+    GENERIC( 
+        signalBitNb : positive := 16;
+        shiftBitNb  : positive := 12
+    );
+    PORT( 
+        lowpassOut : OUT    unsigned (signalBitNb-1 DOWNTO 0);
+        clock      : IN     std_ulogic;
+        reset      : IN     std_ulogic;
+        lowpassIn  : IN     unsigned (signalBitNb-1 DOWNTO 0)
+    );
+
+-- Declarations
+
+END lowpass ;
+