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Libs/RiscV/NEORV32/sw/ocd-firmware/.gitignore vendored Normal file
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*.vhd

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Libs/RiscV/NEORV32/sw/ocd-firmware/README.md Normal file
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# NEORV32 On-Chip Debugger (OCD) - "Park Loop" Code
This folder contains the ASM sources for the *execution-based* debugger code ROM.
`park_loop.S` contains the "park loop" that is executed when the CPU is in debug mode. This code is used to communicate
with the *debug module (DM)* and is responsible for:
* acknowledging halt requests
* processing and acknowledging resume requests
* processing and acknowledging "execute program buffer" requests
* executing the program buffer (provided by the DM)
* catching exceptions while in debug mode
The park loop code is implemented as endless loop that polls the status register of the *debug memory (DBMEM)* module
to check for requests from the DM and sets according flags in the status register to acknowledge these requests.
:warning: Executing `make clean_all all` will **NOT** update the actual debugger code ROM that will be synthesized.
The interface with the DM will break if there are any bugs in this code. However, if you wish to update the code ROM,
copy the array content from `neorv32_debug_mem.code.vhd` to the `code_rom_file` constant in `rtl/core/neorv32_debug_dbmem.vhd`.

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Libs/RiscV/NEORV32/sw/ocd-firmware/debug_rom.ld Normal file
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/* ################################################################################################# */
/* # << NEORV32 - RISC-V GCC Linker Script >> # */
/* # ********************************************************************************************* # */
/* # For the execution based on-chip debugger code memory (/ROM() - "park loop" code # */
/* # ********************************************************************************************* # */
/* # BSD 3-Clause License # */
/* # # */
/* # Copyright (c) 2021, Stephan Nolting. All rights reserved. # */
/* # # */
/* # Redistribution and use in source and binary forms, with or without modification, are # */
/* # permitted provided that the following conditions are met: # */
/* # # */
/* # 1. Redistributions of source code must retain the above copyright notice, this list of # */
/* # conditions and the following disclaimer. # */
/* # # */
/* # 2. Redistributions in binary form must reproduce the above copyright notice, this list of # */
/* # conditions and the following disclaimer in the documentation and/or other materials # */
/* # provided with the distribution. # */
/* # # */
/* # 3. Neither the name of the copyright holder nor the names of its contributors may be used to # */
/* # endorse or promote products derived from this software without specific prior written # */
/* # permission. # */
/* # # */
/* # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS # */
/* # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF # */
/* # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE # */
/* # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, # */
/* # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE # */
/* # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED # */
/* # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING # */
/* # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # */
/* # OF THE POSSIBILITY OF SUCH DAMAGE. # */
/* # ********************************************************************************************* # */
/* # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting # */
/* ################################################################################################# */
/* Default linker script, for normal executables */
/* Copyright (C) 2014-2020 Free Software Foundation, Inc.
Copying and distribution of this script, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. */
/* modified for the NEORV32 processor by Stephan Nolting */
OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv", "elf32-littleriscv")
OUTPUT_ARCH(riscv)
ENTRY(_start)
SEARCH_DIR("/opt/riscv/riscv32-unknown-elf/lib"); SEARCH_DIR("=/opt/riscv/riscv64-unknown-linux-gnu/lib"); SEARCH_DIR("=/usr/local/lib"); SEARCH_DIR("=/lib"); SEARCH_DIR("=/usr/lib");
MEMORY
{
debug_mem (rx) : ORIGIN = 0xFFFFF800, LENGTH = 128
}
/* ************************************************************************* */
SECTIONS
{
/* Actual instructions */
.text :
{
KEEP(*(.text));
} > debug_mem
}

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Libs/RiscV/NEORV32/sw/ocd-firmware/makefile Normal file
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#################################################################################################
# << NEORV32 - Application Makefile >> #
# ********************************************************************************************* #
# Make sure to add the RISC-V GCC compiler's bin folder to your PATH environment variable. #
# ********************************************************************************************* #
# FOR DEBUGGER "PARK LOOP" CODE ONLY! #
# ********************************************************************************************* #
# BSD 3-Clause License #
# #
# Copyright (c) 2021, Stephan Nolting. All rights reserved. #
# #
# Redistribution and use in source and binary forms, with or without modification, are #
# permitted provided that the following conditions are met: #
# #
# 1. Redistributions of source code must retain the above copyright notice, this list of #
# conditions and the following disclaimer. #
# #
# 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
# conditions and the following disclaimer in the documentation and/or other materials #
# provided with the distribution. #
# #
# 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
# endorse or promote products derived from this software without specific prior written #
# permission. #
# #
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
# OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
# OF THE POSSIBILITY OF SUCH DAMAGE. #
# ********************************************************************************************* #
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
# *****************************************************************************
# USER CONFIGURATION
# *****************************************************************************
# User's application sources (*.c, *.cpp, *.s, *.S); add additional files here
APP_SRC ?= $(wildcard ./*.S)
# User's application include folders (don't forget the '-I' before each entry)
APP_INC ?= -I .
# User's application include folders - for assembly files only (don't forget the '-I' before each entry)
ASM_INC ?= -I .
# Optimization
EFFORT ?= -Os
# Compiler toolchain
RISCV_PREFIX ?= riscv32-unknown-elf-
# CPU architecture and ABI
MARCH = rv32i
MABI = ilp32
# User flags for additional configuration (will be added to compiler flags)
USER_FLAGS ?=
# Relative or absolute path to the NEORV32 home folder
NEORV32_HOME ?= ../..
# *****************************************************************************
# -----------------------------------------------------------------------------
# NEORV32 framework
# -----------------------------------------------------------------------------
# Path to NEORV32 linker script and startup file
NEORV32_COM_PATH = $(NEORV32_HOME)/sw/common
# Path to main NEORV32 library include files
NEORV32_INC_PATH = $(NEORV32_HOME)/sw/lib/include
# Path to main NEORV32 library source files
NEORV32_SRC_PATH = $(NEORV32_HOME)/sw/lib/source
# Path to NEORV32 executable generator
NEORV32_EXG_PATH = $(NEORV32_HOME)/sw/image_gen
# Path to NEORV32 core rtl folder
NEORV32_RTL_PATH = $(NEORV32_HOME)/rtl/core
# Marker file to check for NEORV32 home folder
NEORV32_HOME_MARKER = $(NEORV32_INC_PATH)/neorv32.h
# Linker script
LD_SCRIPT = ./debug_rom.ld
# Main output files
APP_ASM = main.asm
APP_IMG = neorv32_debug_mem.code.vhd
# -----------------------------------------------------------------------------
# Sources and objects
# -----------------------------------------------------------------------------
# Define all sources
SRC = $(APP_SRC)
# Define all object files
OBJ = $(SRC:%=%.o)
# -----------------------------------------------------------------------------
# Tools and flags
# -----------------------------------------------------------------------------
# Compiler tools
CC = $(RISCV_PREFIX)gcc
OBJDUMP = $(RISCV_PREFIX)objdump
OBJCOPY = $(RISCV_PREFIX)objcopy
SIZE = $(RISCV_PREFIX)size
# Host native compiler
CC_X86 = g++ -Wall -O -g
# NEORV32 executable image generator
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen
# Compiler & linker flags
CC_OPTS = -march=$(MARCH) -mabi=$(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles -mno-fdiv
CC_OPTS += -Wl,--gc-sections -lm -lc -lgcc -lc
# This accelerates instruction fetch after branches when C extension is enabled (irrelevant when C extension is disabled)
CC_OPTS += -falign-functions=4 -falign-labels=4 -falign-loops=4 -falign-jumps=4
CC_OPTS += $(USER_FLAGS)
# -----------------------------------------------------------------------------
# Application output definitions
# -----------------------------------------------------------------------------
.PHONY: check info help elf_info clean clean_all bootloader
.DEFAULT_GOAL := help
# 'compile' is still here for compatibility
compile: $(APP_ASM)
install: $(APP_ASM) $(APP_IMG)
all: $(APP_ASM) $(APP_IMG)
# Check if making bootloader
# Use different base address and legth for instruction memory/"rom" (BOOTMEM instead of IMEM)
# Also define "make_bootloader" for crt0.S
target bootloader: CC_OPTS += -Wl,--defsym=make_bootloader=1 -Dmake_bootloader
# -----------------------------------------------------------------------------
# Image generator targets
# -----------------------------------------------------------------------------
# install/compile tools
$(IMAGE_GEN): $(NEORV32_EXG_PATH)/image_gen.c
@echo Compiling $(IMAGE_GEN)
@$(CC_X86) $< -o $(IMAGE_GEN)
# -----------------------------------------------------------------------------
# General targets: Assemble, compile, link, dump
# -----------------------------------------------------------------------------
# Compile app *.s sources (assembly)
%.s.o: %.s
@$(CC) -c $(CC_OPTS) -I $(NEORV32_INC_PATH) $(ASM_INC) $< -o $@
# Compile app *.S sources (assembly + C pre-processor)
%.S.o: %.S
@$(CC) -c $(CC_OPTS) -I $(NEORV32_INC_PATH) $(ASM_INC) $< -o $@
# Compile app *.c sources
%.c.o: %.c
@$(CC) -c $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) $< -o $@
# Compile app *.cpp sources
%.cpp.o: %.cpp
@$(CC) -c $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) $< -o $@
# Link object files and show memory utilization
main.elf: $(OBJ)
@$(CC) $(CC_OPTS) -T $(LD_SCRIPT) $(OBJ) -o $@ -lm
@echo "Memory utilization:"
@$(SIZE) main.elf
# Assembly listing file (for debugging)
$(APP_ASM): main.elf
@$(OBJDUMP) -d -S -z $< > $@
# Generate final executable from .text only
main.bin: main.elf $(APP_ASM)
@$(OBJCOPY) -I elf32-little $< -j .text -O binary text.bin
@cat text.bin > $@
@rm -f text.bin
# -----------------------------------------------------------------------------
# Application targets: install (as VHDL file)
# -----------------------------------------------------------------------------
# Generate NEORV32 executable VHDL boot image
$(APP_IMG): main.bin $(IMAGE_GEN)
@set -e
@$(IMAGE_GEN) -app_img $< $@ $(shell basename $(CURDIR))
# -----------------------------------------------------------------------------
# Check toolchain
# -----------------------------------------------------------------------------
check: $(IMAGE_GEN)
@echo "---------------- Check: NEORV32_HOME folder ----------------"
ifneq ($(shell [ -e $(NEORV32_HOME_MARKER) ] && echo 1 || echo 0 ), 1)
$(error NEORV32_HOME folder not found!)
endif
@echo "NEORV32_HOME: $(NEORV32_HOME)"
@echo "---------------- Check: $(CC) ----------------"
@$(CC) -v
@echo "---------------- Check: $(OBJDUMP) ----------------"
@$(OBJDUMP) -V
@echo "---------------- Check: $(OBJCOPY) ----------------"
@$(OBJCOPY) -V
@echo "---------------- Check: $(SIZE) ----------------"
@$(SIZE) -V
@echo "---------------- Check: NEORV32 image_gen ----------------"
@$(IMAGE_GEN) -help
@echo "---------------- Check: Native GCC ----------------"
@$(CC_X86) -v
@echo
@echo "Toolchain check OK"
# -----------------------------------------------------------------------------
# Show configuration
# -----------------------------------------------------------------------------
info:
@echo "---------------- Info: Project ----------------"
@echo "Project folder: $(shell basename $(CURDIR))"
@echo "Source files: $(APP_SRC)"
@echo "Include folder(s): $(APP_INC)"
@echo "ASM include folder(s): $(ASM_INC)"
@echo "---------------- Info: NEORV32 ----------------"
@echo "NEORV32 home folder (NEORV32_HOME): $(NEORV32_HOME)"
@echo "IMAGE_GEN: $(IMAGE_GEN)"
@echo "Core source files:"
@echo "$(CORE_SRC)"
@echo "Core include folder:"
@echo "$(NEORV32_INC_PATH)"
@echo "---------------- Info: Objects ----------------"
@echo "Project object files:"
@echo "$(OBJ)"
@echo "---------------- Info: RISC-V CPU ----------------"
@echo "MARCH: $(MARCH)"
@echo "MABI: $(MABI)"
@echo "---------------- Info: Toolchain ----------------"
@echo "Toolchain: $(RISCV_TOLLCHAIN)"
@echo "CC: $(CC)"
@echo "OBJDUMP: $(OBJDUMP)"
@echo "OBJCOPY: $(OBJCOPY)"
@echo "SIZE: $(SIZE)"
@echo "---------------- Info: Compiler Libraries ----------------"
@echo "LIBGCC:"
@$(CC) -print-libgcc-file-name
@echo "SEARCH-DIRS:"
@$(CC) -print-search-dirs
@echo "---------------- Info: Flags ----------------"
@echo "USER_FLAGS: $(USER_FLAGS)"
@echo "CC_OPTS: $(CC_OPTS)"
@echo "---------------- Info: Host Native GCC Flags ----------------"
@echo "CC_X86: $(CC_X86)"
# -----------------------------------------------------------------------------
# Show final ELF details (just for debugging)
# -----------------------------------------------------------------------------
elf_info: main.elf
@$(OBJDUMP) -x main.elf
# -----------------------------------------------------------------------------
# Help
# -----------------------------------------------------------------------------
help:
@echo "<<< NEORV32 Application Makefile >>>"
@echo "Make sure to add the bin folder of RISC-V GCC to your PATH variable."
@echo "Targets:"
@echo " help - show this text"
@echo " check - check toolchain"
@echo " info - show makefile/toolchain configuration"
@echo " exe - compile and generate <neorv32_exe.bin> executable for upload via bootloader"
@echo " all - compile and generate <neorv32_exe.bin> executable for upload via bootloader and generate and install VHDL IMEM boot image (for application)"
@echo " clean - clean up project"
@echo " clean_all - clean up project, core libraries and image generator"
# -----------------------------------------------------------------------------
# Clean up
# -----------------------------------------------------------------------------
clean:
@rm -f *.elf *.o *.bin *.out *.asm *.vhd
clean_all: clean
@rm -f $(OBJ) $(IMAGE_GEN)

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Libs/RiscV/NEORV32/sw/ocd-firmware/park_loop.S Normal file
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/* ################################################################################################# */
/* # << NEORV32 - park_loop.S - Execution-Based On-Chip Debugger - Park Loop Code >> # */
/* # ********************************************************************************************* # */
/* # BSD 3-Clause License # */
/* # # */
/* # Copyright (c) 2021, Stephan Nolting. All rights reserved. # */
/* # # */
/* # Redistribution and use in source and binary forms, with or without modification, are # */
/* # permitted provided that the following conditions are met: # */
/* # # */
/* # 1. Redistributions of source code must retain the above copyright notice, this list of # */
/* # conditions and the following disclaimer. # */
/* # # */
/* # 2. Redistributions in binary form must reproduce the above copyright notice, this list of # */
/* # conditions and the following disclaimer in the documentation and/or other materials # */
/* # provided with the distribution. # */
/* # # */
/* # 3. Neither the name of the copyright holder nor the names of its contributors may be used to # */
/* # endorse or promote products derived from this software without specific prior written # */
/* # permission. # */
/* # # */
/* # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS # */
/* # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF # */
/* # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE # */
/* # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, # */
/* # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE # */
/* # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED # */
/* # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING # */
/* # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # */
/* # OF THE POSSIBILITY OF SUCH DAMAGE. # */
/* # ********************************************************************************************* # */
/* # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting # */
/* ################################################################################################# */
// debug memory address map
.equ DBMEM_CODE_BASE, 0xfffff800 // base address of dbmem.code_memory
.equ DBMEM_PBUF_BASE, 0xfffff880 // base address of dbmem.program_buffer
.equ DBMEM_DBUF_BASE, 0xfffff900 // base address of dbmem.data_buffer
.equ DBMEM_SREG_BASE, 0xfffff980 // base address of dbmem.status_register
// status register (SREG) bits
.equ SREG_HALTED_ACK, (1<<0) // -/w: CPU is halted in debug mode and waits in park loop
.equ SREG_RESUME_REQ, (1<<1) // r/-: DM requests CPU to resume
.equ SREG_RESUME_ACK, (1<<2) // -/w: CPU starts resuming
.equ SREG_EXECUTE_REQ, (1<<3) // r/-: DM requests to execute program buffer
.equ SREG_EXECUTE_ACK, (1<<4) // -/w: CPU starts to execute program buffer
.equ SREG_EXCEPTION_ACK, (1<<5) // -/w: CPU has detected an exception
.file "park_loop.S"
.section .text
.balign 4
.option norvc
.global _start
.global entry_normal
.global entry_exception
_start:
// BASE + 0: entry for ebreak in debug-mode, halt request or return from single-stepped instruction
entry_normal:
jal zero, parking_loop_start
// BASE + 4: entry for exceptions - signal EXCEPTION to DM and restart parking loop
entry_exception:
csrw dscratch0, s0 // save s0 to dscratch0 so we have a general purpose register available
addi s0, zero, SREG_EXCEPTION_ACK // mask exception acknowledge flag
sw s0, DBMEM_SREG_BASE(zero) // trigger exception acknowledge to inform DM
csrr s0, dscratch0 // restore s0 from dscratch0
ebreak // restart parking loop
// "parking loop": endless loop that polls the status register to check if the DM
// wants to execute code from the program buffer or to resume normal CPU/application operation
parking_loop_start:
csrw dscratch0, s0 // save s0 to dscratch0 so we have a general purpose register available
addi s0, zero, SREG_HALTED_ACK
sw s0, DBMEM_SREG_BASE(zero) // ACK that CPU has halted
parking_loop:
lw s0, DBMEM_SREG_BASE(zero) // get status register
andi s0, s0, SREG_EXECUTE_REQ // request to execute program buffer?
bnez s0, execute_progbuf // execute program buffer
lw s0, DBMEM_SREG_BASE(zero) // get status register
andi s0, s0, SREG_RESUME_REQ // request to resume?
bnez s0, resume // resume normal operation
jal zero, parking_loop // restart parking loop polling
// resume normal operation
resume:
addi s0, zero, SREG_RESUME_ACK
sw s0, DBMEM_SREG_BASE(zero) // ACK that CPU is about to resume
csrr s0, dscratch0 // restore s0 from dscratch0
dret // end debug mode
// execute program buffer
execute_progbuf:
addi s0, zero, SREG_EXECUTE_ACK
sw s0, DBMEM_SREG_BASE(zero) // ACK that execution is about to start
csrr s0, dscratch0 // restore s0 from dscratch0
fence.i // synchronize i-cache & prefetch with memory (program buffer)
jalr zero, zero, %lo(DBMEM_PBUF_BASE) // jump to beginning of program buffer