Klagarge/SEm-Labos
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github-classroom[bot]
2024-02-23 13:01:05 +00:00
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commit d212040c30
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03-DigitalToAnalogConverter/DigitalToAnalogConverter/hdl/DAC_order2_studentVersion.vhd Normal file
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ARCHITECTURE order2_studentVersion OF DAC IS
BEGIN
serialOut <= '0';
END ARCHITECTURE order2_studentVersion;