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add trigger + shift register + coeff

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This commit is contained in:
Rémi Heredero
2024-03-08 16:16:59 +01:00
parent 5c9f884e2f
commit cf05b0a7f9
8 changed files with 85 additions and 15 deletions
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28
02-SplineInterpolator/SplineInterpolator/hdl/interpolatorCoefficients_studentVersion.vhd
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@@ -1,7 +1,27 @@
ARCHITECTURE studentVersion OF interpolatorCoefficients IS
subtype sample is signed(bitNb-1 DOWNTO 0);
subtype coeff is signed(coeffBitNb-1 DOWNTO 0);
type samples_type is array (1 to 4) of coeff;
signal samples: samples_type;
BEGIN
a <= (others => '0');
b <= (others => '0');
c <= (others => '0');
d <= (others => '0');
-- a = - sample1 +3·sample2 -3·sample3 + sample4
-- b = 2·sample1 -5·sample2 +4·sample3 - sample4
-- c = - sample1 + sample3
-- d = sample2
process(sample1, sample2, sample3, sample4) begin
samples(4) <= resize(sample1, coeff'high+1);
samples(3) <= resize(sample2, coeff'high+1);
samples(2) <= resize(sample3, coeff'high+1);
samples(1) <= resize(sample4, coeff'high+1);
end process;
a <= samples(4) - samples(1) + resize( 3*(samples(2) - samples(3)), coeff'high+1);
b <= resize(2*samples(1), coeff'high+1) - resize(5*samples(2), coeff'high+1) + resize(4*samples(3), coeff'high+1) - samples(4);
c <= samples(3) - samples(1);
d <= samples(4);
END ARCHITECTURE studentVersion;