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This commit is contained in:
Rémi Heredero
2024-03-15 15:03:34 +01:00
parent 3095603e39
commit 9ceb15c0ff
612 changed files with 272868 additions and 0 deletions
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zz-solutions/02-SplineInterpolator/SplineInterpolator/hdl/sineTable_studentVersion.vhd Normal file
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ARCHITECTURE studentVersion OF sineTable IS
signal phaseTableAddress : unsigned(tableAddressBitNb-1 downto 0);
signal quarterSine : signed(sine'range);
BEGIN
phaseTableAddress <= phase(phase'high-2 downto phase'high-2-tableAddressBitNb+1);
quarterTable: process(phaseTableAddress)
begin
case to_integer(phaseTableAddress) is
when 0 => quarterSine <= to_signed(16#0000#, quarterSine'length);
when 1 => quarterSine <= to_signed(16#18F9#, quarterSine'length);
when 2 => quarterSine <= to_signed(16#30FB#, quarterSine'length);
when 3 => quarterSine <= to_signed(16#471C#, quarterSine'length);
when 4 => quarterSine <= to_signed(16#5A82#, quarterSine'length);
when 5 => quarterSine <= to_signed(16#6A6D#, quarterSine'length);
when 6 => quarterSine <= to_signed(16#7641#, quarterSine'length);
when 7 => quarterSine <= to_signed(16#7D89#, quarterSine'length);
when others => quarterSine <= (others => '-');
end case;
end process quarterTable;
sine <= (others => '0');
END ARCHITECTURE studentVersion;