add encoding SM --not finish yet

zz-solutions/04-Lissajous/Board/hdl/dff_entity.vhg

@@ -0,0 +1,23 @@
+-- VHDL Entity Board.DFF.symbol
+--
+-- Created:
+--          by - francois.francois (Aphelia)
+--          at - 13:07:05 02/19/19
+--
+-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
+--
+LIBRARY ieee;
+USE ieee.std_logic_1164.all;
+
+ENTITY DFF IS
+    PORT( 
+        CLK : IN     std_uLogic;
+        CLR : IN     std_uLogic;
+        D   : IN     std_uLogic;
+        Q   : OUT    std_uLogic
+    );
+
+-- Declarations
+
+END DFF ;
+