add ahbGPIO

06-07-08-09-SystemOnChip/AhbLiteComponents/hdl/ahbGpio_studentVersion.vhd

@@ -17,18 +17,22 @@
 -- Read registers
 -- 00, data register provides the values detected on the lines.
 --
-signal addresses is unsigned(32 downto 0);
-signal bRead is std_ulogic;
-signal bWrite is std_ulogic;
-
 ARCHITECTURE studentVersion OF ahbGpio IS
+
+signal addresses: unsigned(hAddr'range);
+signal bRead: std_ulogic;
+signal bWrite: std_ulogic;
+signal bDone: std_ulogic;
+
+
 BEGIN
 
   process(hReset_n, hClk) begin
-    if hReset_n = '1' then
+    if hReset_n = '0' then
       -- AHB-Lite
+      --hRData  <=  (OTHERS => 'Z');
       hRData  <=  (OTHERS => '0');
-      hReady  <=  '0';  
+      hReady  <=  '1';  
       hResp   <=  '0';  
 
       -- Out
@@ -37,16 +41,90 @@ BEGIN
 
       addresses  <=  (OTHERS => '0');
       bRead <= '0';
-      bWrite <= '1';
+      bWrite <= '0';
+      bDone <= '0';
     elsif rising_edge(hClk) then
       if hSel = '1' then
-        CASE hAddr is
+        bWrite <= hWrite;
-          WHEN 00 =>
+        bRead <= not hWrite;
-          WHEN 01 =>
+        addresses <= hAddr;
-          WHEN OTHERS
+        hReady <= '0';
-        end CASE;
+        bDone <= '0';
+      else
+        bWrite <= '0';
+        bRead <= '0';
       end if;
+
+      if bRead = '1' and bWrite = '0' then
+        -------------------------------------------------------------------------
+        -- READ
+        -------------------------------------------------------------------------
+        
+        if addresses = "00" then
+          -- ##### Read data register #####
+          --hRData <= unsigned(resize(ioIn, ioNb));
+          for i in 0 to ioNb-1 loop
+            hRData(i) <= ioIn(i);
+          end loop;
+          bDone <= '1';
+
+        elsif addresses = "01" then
+          report "@@@@@@@@@@ Not possible to change output in READ mode @@@@@@@@@@" severity error;
+
+        end if;
+
+      elsif bRead = '0' and bWrite = '1' then
+        -------------------------------------------------------------------------
+        -- WRITE
+        -------------------------------------------------------------------------
+        
+        if addresses = "00" then
+          -- ##### Write data register #####
+          --ioOut <= resize(std_ulogic_vector(hWData), ioNb);
+          for i in 0 to ioNb-1 loop
+            ioOut(i) <= hWData(i);
+          end loop;
+          bDone <= '1';
+
+        elsif addresses = "01" then
+          -- ##### Write direction register #####
+          --ioEn <= hWData;
+          for i in 0 to ioNb-1 loop
+            ioEn(i) <= hWData(i);
+          end loop;
+          bDone <= '1';
+          
+        end if;
+
+      elsif bRead = '1' and bWrite = '1' then
+        -------------------------------------------------------------------------
+        -- SHOULD NEVER HAPPEN
+        -------------------------------------------------------------------------
+        report "@@@@@@@@@@ READ and WRITE can't happened in same time @@@@@@@@@@" severity error;
+
+      end if;
+
+      if (ioIn and ioEn) = (ioEn and ioOut) then
+        hResp <= '0';
+      else
+        hResp <= '1';
+      end if;
+
+      if bDone = '1' then
+        --hRData  <=  (OTHERS => 'Z');
+        bDone <= '0';
+        hReady <= '1';
+      end if;
+
     end if;
+
+    for i in (ioNb-1) downto 0 loop
+      if (ioEn(i) and ioIn(i)) /= (ioEn(i) and ioOut(i)) then
+        --ioEn(i) <= '0';
+        report "an output was in conflict" severity note;
+      end if;
+    end loop;
+
   end process;
 
   -- AHB-Lite

06-07-08-09-SystemOnChip/AhbLiteComponents_test/hdl/ahbgpio_tb_struct.vhg

@@ -2,8 +2,8 @@
 -- VHDL Architecture AhbLiteComponents_test.ahbGpio_tb.struct
 --
 -- Created:
---          by - axel.amand.UNKNOWN (WE7860)
+--          by - remi.heredero.UNKNOWN (WE2330808)
---          at - 15:06:49 28.04.2023
+--          at - 14:16:25 19.04.2024
 --
 -- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
 --

06-07-08-09-SystemOnChip/AhbLiteComponents_test/hds/ahb@gpio_tb/struct.bd

@@ -74,23 +74,23 @@ value " "
 )
 (vvPair
 variable "HDLDir"
-value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hdl"
+value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hdl"
 )
 (vvPair
 variable "HDSDir"
-value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds"
+value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds"
 )
 (vvPair
 variable "SideDataDesignDir"
-value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@gpio_tb\\struct.bd.info"
+value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@gpio_tb\\struct.bd.info"
 )
 (vvPair
 variable "SideDataUserDir"
-value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@gpio_tb\\struct.bd.user"
+value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@gpio_tb\\struct.bd.user"
 )
 (vvPair
 variable "SourceDir"
-value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds"
+value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds"
 )
 (vvPair
 variable "appl"
@@ -114,15 +114,15 @@ value "%(unit)_%(view)_config"
 )
 (vvPair
 variable "d"
-value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@gpio_tb"
+value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@gpio_tb"
 )
 (vvPair
 variable "d_logical"
-value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahbGpio_tb"
+value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahbGpio_tb"
 )
 (vvPair
 variable "date"
-value "28.04.2023"
+value "19.04.2024"
 )
 (vvPair
 variable "day"
@@ -134,7 +134,7 @@ value "vendredi"
 )
 (vvPair
 variable "dd"
-value "28"
+value "19"
 )
 (vvPair
 variable "designName"
@@ -162,11 +162,11 @@ value "struct"
 )
 (vvPair
 variable "graphical_source_author"
-value "axel.amand"
+value "remi.heredero"
 )
 (vvPair
 variable "graphical_source_date"
-value "28.04.2023"
+value "19.04.2024"
 )
 (vvPair
 variable "graphical_source_group"
@@ -174,11 +174,11 @@ value "UNKNOWN"
 )
 (vvPair
 variable "graphical_source_host"
-value "WE7860"
+value "WE2330808"
 )
 (vvPair
 variable "graphical_source_time"
-value "15:06:49"
+value "14:16:25"
 )
 (vvPair
 variable "group"
@@ -186,7 +186,7 @@ value "UNKNOWN"
 )
 (vvPair
 variable "host"
-value "WE7860"
+value "WE2330808"
 )
 (vvPair
 variable "language"
@@ -222,11 +222,11 @@ value "avril"
 )
 (vvPair
 variable "p"
-value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@gpio_tb\\struct.bd"
+value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@gpio_tb\\struct.bd"
 )
 (vvPair
 variable "p_logical"
-value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahbGpio_tb\\struct.bd"
+value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahbGpio_tb\\struct.bd"
 )
 (vvPair
 variable "package_name"
@@ -306,7 +306,7 @@ value "struct"
 )
 (vvPair
 variable "time"
-value "15:06:49"
+value "14:16:25"
 )
 (vvPair
 variable "unit"
@@ -314,7 +314,7 @@ value "ahbGpio_tb"
 )
 (vvPair
 variable "user"
-value "axel.amand"
+value "remi.heredero"
 )
 (vvPair
 variable "version"
@@ -326,11 +326,11 @@ value "struct"
 )
 (vvPair
 variable "year"
-value "2023"
+value "2024"
 )
 (vvPair
 variable "yy"
-value "23"
+value "24"
 )
 ]
 )
@@ -668,8 +668,7 @@ isHidden 1
 font "Courier New,9,0"
 )
 xt "0,0,15500,1200"
-st "SIGNAL hReset_n : std_uLogic
+st "SIGNAL hReset_n : std_uLogic"
-"
 )
 )
 *13 (Net
@@ -687,8 +686,7 @@ isHidden 1
 font "Courier New,9,0"
 )
 xt "0,0,15500,1200"
-st "SIGNAL hClk     : std_uLogic
+st "SIGNAL hClk     : std_uLogic"
-"
 )
 )
 *14 (Net
@@ -706,8 +704,7 @@ isHidden 1
 font "Courier New,9,0"
 )
 xt "0,0,15500,1200"
-st "SIGNAL hResp    : std_uLogic
+st "SIGNAL hResp    : std_uLogic"
-"
 )
 )
 *15 (Net
@@ -725,8 +722,7 @@ isHidden 1
 font "Courier New,9,0"
 )
 xt "0,0,15500,1200"
-st "SIGNAL hReady   : std_uLogic
+st "SIGNAL hReady   : std_uLogic"
-"
 )
 )
 *16 (Net
@@ -745,8 +741,7 @@ isHidden 1
 font "Courier New,9,0"
 )
 xt "0,0,32000,1200"
-st "SIGNAL hRData   : std_ulogic_vector(ahbDataBitNb-1 DOWNTO 0)
+st "SIGNAL hRData   : std_ulogic_vector(ahbDataBitNb-1 DOWNTO 0)"
-"
 )
 )
 *17 (Net
@@ -764,8 +759,7 @@ isHidden 1
 font "Courier New,9,0"
 )
 xt "0,0,15500,1200"
-st "SIGNAL hSel     : std_uLogic
+st "SIGNAL hSel     : std_uLogic"
-"
 )
 )
 *18 (Net
@@ -783,8 +777,7 @@ isHidden 1
 font "Courier New,9,0"
 )
 xt "0,0,15500,1200"
-st "SIGNAL hWrite   : std_uLogic
+st "SIGNAL hWrite   : std_uLogic"
-"
 )
 )
 *19 (Net
@@ -803,8 +796,7 @@ isHidden 1
 font "Courier New,9,0"
 )
 xt "0,0,32500,1200"
-st "SIGNAL hTrans   : std_ulogic_vector(ahbTransBitNb-1 DOWNTO 0)
+st "SIGNAL hTrans   : std_ulogic_vector(ahbTransBitNb-1 DOWNTO 0)"
-"
 )
 )
 *20 (Net
@@ -823,8 +815,7 @@ isHidden 1
 font "Courier New,9,0"
 )
 xt "0,0,32000,1200"
-st "SIGNAL hWData   : std_ulogic_vector(ahbDataBitNb-1 DOWNTO 0)
+st "SIGNAL hWData   : std_ulogic_vector(ahbDataBitNb-1 DOWNTO 0)"
-"
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 )
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 font "Courier New,9,0"
 )
 xt "0,0,30000,1200"
-st "SIGNAL hAddr    : unsigned( ahbAddressBitNb-1 DOWNTO 0 )
+st "SIGNAL hAddr    : unsigned( ahbAddressBitNb-1 DOWNTO 0 )"
-"
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 )
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 font "Courier New,9,0"
 )
 xt "0,0,28000,1200"
-st "SIGNAL ioEn     : std_ulogic_vector(ioNb-1 DOWNTO 0)
+st "SIGNAL ioEn     : std_ulogic_vector(ioNb-1 DOWNTO 0)"
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 font "Courier New,9,0"
 )
 xt "0,0,28000,1200"
-st "SIGNAL ioOut    : std_ulogic_vector(ioNb-1 DOWNTO 0)
+st "SIGNAL ioOut    : std_ulogic_vector(ioNb-1 DOWNTO 0)"
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 font "Courier New,9,0"
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 font "Courier New,9,0"
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+st "SIGNAL io       : std_logic_vector(ioNb-1 DOWNTO 0)"
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 *51 (Wire
@@ -2351,8 +2337,8 @@ tm "BdCompilerDirectivesTextMgr"
 ]
 associable 1
 )
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+windowSize "164,195,1039,926"
-viewArea "27426,17402,170102,94921"
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@@ -2376,7 +2362,7 @@ boundaryWidth 0
 )
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-lastUid 13522,0
+lastUid 13575,0
 defaultCommentText (CommentText
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06-07-08-09-SystemOnChip/Prefs/hds_user/v2019.2/hds_user_prefs

@@ -4149,7 +4149,7 @@ hdsWorkspaceLocation ""
 relativeLibraryRootDir ""
 vmLabelLatestDontAskAgain 0
 vmLabelWorkspaceDontAskAgain 0
-logWindowGeometry "636x406+308+98"
+logWindowGeometry "636x514+308+98"
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 showInsertPortHint 0
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@@ -6031,6 +6031,96 @@ disableFilters 1
 ]
 layoutExpression "V(H(A(C(DesignUnits),C(LogicalObjects)),A(C(Files))),A(C(DesignHierarchy)))"
 )
+(Viewpoint_v2
+name "Parse Errors Report"
+TreeListVPDatas [
+(TreeListVPData
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+columns [
+(TreeListVPData_Column
+name "Design Unit Name"
+displayName ""
+width 150
+)
+(TreeListVPData_Column
+name "Extends"
+displayName ""
+width 100
+)
+(TreeListVPData_Column
+name "Name"
+displayName ""
+width 250
+)
+(TreeListVPData_Column
+name "Library"
+displayName ""
+width 120
+)
+]
+filterString ""
+accessRights 2
+)
+]
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+(SmartTableVPData
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+columns [
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+name "Parse Error"
+width 22
+alignment 0
+)
+(SmartTableVPData_Column
+name "File Name"
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+)
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+)
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+name "Library"
+width 120
+alignment 0
+)
+(SmartTableVPData_Column
+name "Location"
+width 200
+alignment 0
+)
+(SmartTableVPData_Column
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+width 14
+alignment 1
+)
+]
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+"Configurations"
+"Entities"
+"Files"
+"Instances"
+"Packages"
+"SV Classes"
+"SV Interfaces"
+"SV Packages"
+"SV Program Blocks"
+]
+filterString "1"
+filterColumn "Parse Error"
+matchCase 0
+matchWholeWordOnly 0
+regularExpression 1
+groupNames [
+]
+disableFilters 1
+)
+]
+layoutExpression "V(A(C(LogicalObjects)))"
+)
 ]
 WorkTabs [
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@@ -6226,6 +6316,7 @@ activeViewpointIdx 0
 )
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 ViewpointsOnOutlookBar [
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 ]
 lastActiveViewpoint "Default Viewpoint"
 expandedTemplateNodes [

06-07-08-09-SystemOnChip/Prefs/hds_user/v2019.2/hds_user_prefs.bak

@@ -1280,6 +1280,7 @@ projectPaths [
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 "C:\\work\\edu\\sem\\labo\\sem_labs\\06-07-08-09-SystemOnChip\\Prefs\\hds.hdp"
 "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\hds.hdp"
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 ]
 libMappingsRootDir ""
 teamLibMappingsRootDir ""
@@ -1300,288 +1301,144 @@ exportedDirectories [
 exportStdIncludeRefs 1
 exportStdPackageRefs 1
 )
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+printerName "\\\\vmenpprint1\\VS-ENP.23.N308-PRN"
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 type 5
 width 783
 height 1290
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-name "A3 (297 x 420 mm)"
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-name "A4 (210 x 297 mm)"
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-name "A5 (148 x 210 mm)"
+name "A5"
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-name "A6 (105 x 148 mm)"
+name "B4 (JIS)"
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-)
-(PageSizeInfo
-name "B4 JIS (257 x 364 mm)"
 type 12
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 height 1320
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-name "B5 JIS (182 x 257 mm)"
+name "B5 (JIS)"
 type 13
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-name "B6 JIS (128 x 182 mm)"
+name "11<EFBFBD>17"
-type 88
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 (PageSizeInfo
-name "8\" x 13\""
+name "Envelope #10"
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-(PageSizeInfo
-name "SRA4 (225 x 320 mm)"
-type 531
-width 816
-height 1161
-)
-(PageSizeInfo
-name "Format papier personnalis<69>"
-type 256
-width 783
-height 1013
-)
-(PageSizeInfo
-name "Custom Paper Size1(215,9 x 279,4 mm)"
-type 257
-width 783
-height 1013
-)
-(PageSizeInfo
-name "Custom Paper Size2(215,9 x 279,4 mm)"
-type 258
-width 783
-height 1013
-)
-(PageSizeInfo
-name "Custom Paper Size3(215,9 x 279,4 mm)"
-type 259
-width 783
-height 1013
-)
-(PageSizeInfo
-name "Custom Paper Size4(215,9 x 279,4 mm)"
-type 260
-width 783
-height 1013
-)
-(PageSizeInfo
-name "Custom Paper Size5(215,9 x 279,4 mm)"
-type 261
-width 783
-height 1013
-)
-(PageSizeInfo
-name "Custom Paper Size6(215,9 x 279,4 mm)"
-type 262
-width 783
-height 1013
-)
-(PageSizeInfo
-name "Custom Paper Size7(215,9 x 279,4 mm)"
-type 263
-width 783
-height 1013
-)
-(PageSizeInfo
-name "Custom Paper Size8(215,9 x 279,4 mm)"
-type 264
-width 783
-height 1013
-)
-(PageSizeInfo
-name "Custom Paper Size9(215,9 x 279,4 mm)"
-type 265
-width 783
-height 1013
-)
-(PageSizeInfo
-name "Custom Paper Size10(215,9 x 279,4 mm)"
-type 266
-width 783
-height 1013
 )
 ]
 exportPageSetupInfo (PageSetupInfo
@@ -4292,7 +4149,7 @@ hdsWorkspaceLocation ""
 relativeLibraryRootDir ""
 vmLabelLatestDontAskAgain 0
 vmLabelWorkspaceDontAskAgain 0
-logWindowGeometry "636x406+-823+276"
+logWindowGeometry "636x406+308+98"
 diagramBrowserTabNo 0
 showInsertPortHint 0
 showContentFirstTime 0
@@ -6174,6 +6031,96 @@ disableFilters 1
 ]
 layoutExpression "V(H(A(C(DesignUnits),C(LogicalObjects)),A(C(Files))),A(C(DesignHierarchy)))"
 )
+(Viewpoint_v2
+name "Parse Errors Report"
+TreeListVPDatas [
+(TreeListVPData
+theList "Hierarchy"
+columns [
+(TreeListVPData_Column
+name "Design Unit Name"
+displayName ""
+width 150
+)
+(TreeListVPData_Column
+name "Extends"
+displayName ""
+width 100
+)
+(TreeListVPData_Column
+name "Name"
+displayName ""
+width 250
+)
+(TreeListVPData_Column
+name "Library"
+displayName ""
+width 120
+)
+]
+filterString ""
+accessRights 2
+)
+]
+SmartTableVPDatas [
+(SmartTableVPData
+theList "Logical Objects"
+columns [
+(SmartTableVPData_Column
+name "Parse Error"
+width 22
+alignment 0
+)
+(SmartTableVPData_Column
+name "File Name"
+width 150
+alignment 0
+)
+(SmartTableVPData_Column
+name "Language"
+width 100
+alignment 0
+)
+(SmartTableVPData_Column
+name "Library"
+width 120
+alignment 0
+)
+(SmartTableVPData_Column
+name "Location"
+width 200
+alignment 0
+)
+(SmartTableVPData_Column
+name "Absolute Path"
+width 14
+alignment 1
+)
+]
+filterNames [
+"Architectures and Modules"
+"Configurations"
+"Entities"
+"Files"
+"Instances"
+"Packages"
+"SV Classes"
+"SV Interfaces"
+"SV Packages"
+"SV Program Blocks"
+]
+filterString "1"
+filterColumn "Parse Error"
+matchCase 0
+matchWholeWordOnly 0
+regularExpression 1
+groupNames [
+]
+disableFilters 1
+)
+]
+layoutExpression "V(A(C(LogicalObjects)))"
+)
 ]
 WorkTabs [
 (WorkTab
@@ -6369,6 +6316,7 @@ activeViewpointIdx 0
 )
 ]
 ViewpointsOnOutlookBar [
+"Parse Errors Report"
 ]
 lastActiveViewpoint "Default Viewpoint"
 expandedTemplateNodes [
@@ -6384,11 +6332,10 @@ size 180
 ]
 displayHierarchy 0
 xPos 0
-yPos 0
+yPos 9
-width 1936
+width 974
-height 1056
+height 1047
 activeSidePanelTab 2
-activeLibraryTab 1
 sidePanelSize 278
 showUnixHiddenFiles 0
 componentBrowserXpos 569