add resize + tabel

02-SplineInterpolator/SplineInterpolator/hdl/interpolatortrigger_entity.vhg

@@ -0,0 +1,27 @@
+-- VHDL Entity SplineInterpolator.interpolatorTrigger.symbol
+--
+-- Created:
+--          by - francois.francois (Aphelia)
+--          at - 13:00:28 02/19/19
+--
+-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
+--
+LIBRARY ieee;
+  USE ieee.std_logic_1164.all;
+  USE ieee.numeric_std.all;
+
+ENTITY interpolatorTrigger IS
+    GENERIC( 
+        counterBitNb : positive := 4
+    );
+    PORT( 
+        triggerOut : OUT    std_ulogic;
+        clock      : IN     std_ulogic;
+        reset      : IN     std_ulogic;
+        en         : IN     std_ulogic
+    );
+
+-- Declarations
+
+END interpolatorTrigger ;
+