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xt "58092,25546,59000,26454"
radius 454
)
]
ps "OnEdgeStrategy"
shape (Triangle
uid 186,0
ro 90
va (VaSet
vasetType 1
isHidden 1
fg "0,65535,0"
)
xt "57342,25625,58092,26375"
)
tg (CPTG
uid 187,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 188,0
va (VaSet
isHidden 1
font "Verdana,12,0"
)
xt "59000,25500,61700,26900"
st "in1"
blo "59000,26700"
)
s (Text
uid 189,0
va (VaSet
isHidden 1
font "Verdana,12,0"
)
xt "59000,26900,59000,26900"
blo "59000,26900"
)
)
thePort (LogicalPort
decl (Decl
n "in1"
t "std_uLogic"
o 1
)
)
)
*37 (CptPort
uid 191,0
ps "OnEdgeStrategy"
shape (Triangle
uid 192,0
ro 90
va (VaSet
vasetType 1
isHidden 1
fg "0,65535,0"
)
xt "64000,25625,64750,26375"
)
tg (CPTG
uid 193,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 194,0
va (VaSet
isHidden 1
font "Verdana,12,0"
)
xt "60050,25500,63750,26900"
st "out1"
ju 2
blo "63750,26700"
)
s (Text
uid 195,0
va (VaSet
isHidden 1
font "Verdana,12,0"
)
xt "63750,26900,63750,26900"
ju 2
blo "63750,26900"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "out1"
t "std_uLogic"
o 2
)
)
)
]
shape (Buf
uid 177,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "59000,23000,64000,29000"
)
showPorts 0
oxt "23000,4000,28000,10000"
ttg (MlTextGroup
uid 178,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*38 (Text
uid 179,0
va (VaSet
)
xt "60460,28700,64060,29900"
st "Board"
blo "60460,29700"
tm "BdLibraryNameMgr"
)
*39 (Text
uid 180,0
va (VaSet
)
xt "60460,29700,66860,30900"
st "inverterIn"
blo "60460,30700"
tm "CptNameMgr"
)
*40 (Text
uid 181,0
va (VaSet
)
xt "60460,30700,64460,31900"
st "I_inv2"
blo "60460,31700"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 182,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 183,0
text (MLText
uid 184,0
va (VaSet
)
xt "59000,29400,59000,29400"
)
header ""
)
elements [
]
)
portVis (PortSigDisplay
disp 1
sN 0
sTC 0
sT 1
)
archFileType "UNKNOWN"
)
*41 (SaComponent
uid 196,0
optionalChildren [
*42 (CptPort
uid 205,0
ps "OnEdgeStrategy"
shape (Triangle
uid 206,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "87000,21625,87750,22375"
)
tg (CPTG
uid 207,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 208,0
va (VaSet
)
xt "80600,21550,86000,22750"
st "countOut"
ju 2
blo "86000,22550"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "countOut"
t "unsigned"
b "(bitNb-1 downto 0)"
o 1
)
)
)
*43 (CptPort
uid 209,0
ps "OnEdgeStrategy"
shape (Triangle
uid 210,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "70250,21625,71000,22375"
)
tg (CPTG
uid 211,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 212,0
va (VaSet
)
xt "72000,21400,75400,22600"
st "clock"
blo "72000,22400"
)
)
thePort (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
o 2
)
)
)
*44 (CptPort
uid 213,0
ps "OnEdgeStrategy"
shape (Triangle
uid 214,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "70250,23625,71000,24375"
)
tg (CPTG
uid 215,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 216,0
va (VaSet
)
xt "72000,23550,75300,24750"
st "reset"
blo "72000,24550"
)
)
thePort (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 3
)
)
)
]
shape (Rectangle
uid 197,0
va (VaSet
vasetType 1
fg "0,65535,0"
bg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "71000,18000,87000,26000"
)
oxt "32000,15000,48000,23000"
ttg (MlTextGroup
uid 198,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*45 (Text
uid 199,0
va (VaSet
font "Verdana,9,1"
)
xt "71600,25800,82400,27000"
st "PipelinedOperators"
blo "71600,26800"
tm "BdLibraryNameMgr"
)
*46 (Text
uid 200,0
va (VaSet
font "Verdana,9,1"
)
xt "71600,26700,80600,27900"
st "pipelineCounter"
blo "71600,27700"
tm "CptNameMgr"
)
*47 (Text
uid 201,0
va (VaSet
font "Verdana,9,1"
)
xt "71600,27600,74900,28800"
st "I_cnt"
blo "71600,28600"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 202,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 203,0
text (MLText
uid 204,0
va (VaSet
font "Verdana,8,0"
)
xt "71000,29400,90400,31400"
st "bitNb   = counterBitNb       ( positive )  
stageNb = pipelineStageNb    ( positive )  "
)
header ""
)
elements [
(GiElement
name "bitNb"
type "positive"
value "counterBitNb"
)
(GiElement
name "stageNb"
type "positive"
value "pipelineStageNb"
)
]
)
ordering 1
connectByName 1
portVis (PortSigDisplay
sTC 0
)
archFileType "UNKNOWN"
)
*48 (PortIoOut
uid 217,0
shape (CompositeShape
uid 218,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 219,0
sl 0
ro 270
xt "95500,21625,97000,22375"
)
(Line
uid 220,0
sl 0
ro 270
xt "95000,22000,95500,22000"
pts [
"95000,22000"
"95500,22000"
]
)
]
)
tg (WTG
uid 221,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 222,0
va (VaSet
isHidden 1
font "Verdana,12,0"
)
xt "98000,21300,124300,22700"
st "countOut : (counterBitNb-1 downto 0)"
blo "98000,22500"
tm "WireNameMgr"
)
)
)
*49 (Net
uid 259,0
decl (Decl
n "reset_n"
t "std_ulogic"
o 1
suid 1,0
)
declText (MLText
uid 260,0
va (VaSet
)
xt "2000,11600,15600,12800"
st "reset_n      : std_ulogic
"
)
)
*50 (Net
uid 261,0
decl (Decl
n "resetSynch"
t "std_ulogic"
o 2
suid 2,0
)
declText (MLText
uid 262,0
va (VaSet
)
xt "2000,21200,21100,22400"
st "SIGNAL resetSynch   : std_ulogic
"
)
)
*51 (Net
uid 263,0
decl (Decl
n "clock"
t "std_ulogic"
o 3
suid 3,0
)
declText (MLText
uid 264,0
va (VaSet
)
xt "2000,10400,15100,11600"
st "clock        : std_ulogic
"
)
)
*52 (Net
uid 265,0
decl (Decl
n "reset"
t "std_ulogic"
o 4
suid 4,0
)
declText (MLText
uid 266,0
va (VaSet
)
xt "2000,20000,19500,21200"
st "SIGNAL reset        : std_ulogic
"
)
)
*53 (Net
uid 269,0
decl (Decl
n "logic1"
t "std_uLogic"
o 6
suid 6,0
)
declText (MLText
uid 270,0
va (VaSet
)
xt "2000,18800,20000,20000"
st "SIGNAL logic1       : std_uLogic
"
)
)
*54 (Net
uid 271,0
decl (Decl
n "countOut"
t "unsigned"
b "(counterBitNb-1 downto 0)"
o 7
suid 7,0
)
declText (MLText
uid 272,0
va (VaSet
)
xt "2000,12800,29600,14000"
st "countOut     : unsigned(counterBitNb-1 downto 0)
"
)
)
*55 (SaComponent
uid 323,0
optionalChildren [
*56 (CptPort
uid 287,0
ps "OnEdgeStrategy"
shape (Triangle
uid 288,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "58000,18625,58750,19375"
)
tg (CPTG
uid 289,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 290,0
va (VaSet
font "Verdana,8,0"
)
xt "52700,18500,57000,19500"
st "clk10MHz"
ju 2
blo "57000,19300"
)
)
thePort (LogicalPort
lang 11
m 1
decl (Decl
n "clk10MHz"
t "std_ulogic"
o 8
suid 1,0
)
)
)
*57 (CptPort
uid 291,0
ps "OnEdgeStrategy"
shape (Triangle
uid 292,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "58000,17625,58750,18375"
)
tg (CPTG
uid 293,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 294,0
va (VaSet
font "Verdana,8,0"
)
xt "52700,17500,57000,18500"
st "clk50MHz"
ju 2
blo "57000,18300"
)
)
thePort (LogicalPort
lang 11
m 1
decl (Decl
n "clk50MHz"
t "std_ulogic"
o 7
suid 2,0
)
)
)
*58 (CptPort
uid 295,0
ps "OnEdgeStrategy"
shape (Triangle
uid 296,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "58000,14625,58750,15375"
)
tg (CPTG
uid 297,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 298,0
va (VaSet
font "Verdana,8,0"
)
xt "52700,14500,57000,15500"
st "clk60MHz"
ju 2
blo "57000,15300"
)
)
thePort (LogicalPort
lang 11
m 1
decl (Decl
n "clk60MHz"
t "std_ulogic"
o 5
suid 3,0
)
)
)
*59 (CptPort
uid 299,0
ps "OnEdgeStrategy"
shape (Triangle
uid 300,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "58000,16625,58750,17375"
)
tg (CPTG
uid 301,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 302,0
va (VaSet
font "Verdana,8,0"
)
xt "52700,16500,57000,17500"
st "clk75MHz"
ju 2
blo "57000,17300"
)
)
thePort (LogicalPort
lang 11
m 1
decl (Decl
n "clk75MHz"
t "std_ulogic"
o 6
suid 4,0
)
)
)
*60 (CptPort
uid 303,0
ps "OnEdgeStrategy"
shape (Triangle
uid 304,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "45250,18625,46000,19375"
)
tg (CPTG
uid 305,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 306,0
va (VaSet
font "Verdana,8,0"
)
xt "47000,18500,50200,19500"
st "en10M"
blo "47000,19300"
)
)
thePort (LogicalPort
lang 11
decl (Decl
n "en10M"
t "std_ulogic"
o 4
suid 6,0
)
)
)
*61 (CptPort
uid 307,0
ps "OnEdgeStrategy"
shape (Triangle
uid 308,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "45250,17625,46000,18375"
)
tg (CPTG
uid 309,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 310,0
va (VaSet
font "Verdana,8,0"
)
xt "47000,17500,50200,18500"
st "en50M"
blo "47000,18300"
)
)
thePort (LogicalPort
lang 11
decl (Decl
n "en50M"
t "std_ulogic"
o 3
suid 7,0
)
)
)
*62 (CptPort
uid 311,0
ps "OnEdgeStrategy"
shape (Triangle
uid 312,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "45250,16625,46000,17375"
)
tg (CPTG
uid 313,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 314,0
va (VaSet
font "Verdana,8,0"
)
xt "47000,16500,50200,17500"
st "en75M"
blo "47000,17300"
)
)
thePort (LogicalPort
lang 11
decl (Decl
n "en75M"
t "std_ulogic"
o 2
suid 8,0
)
)
)
*63 (CptPort
uid 315,0
ps "OnEdgeStrategy"
shape (Triangle
uid 316,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "58000,20625,58750,21375"
)
tg (CPTG
uid 317,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 318,0
va (VaSet
font "Verdana,8,0"
)
xt "52800,20500,57000,21500"
st "pllLocked"
ju 2
blo "57000,21300"
)
)
thePort (LogicalPort
lang 11
m 1
decl (Decl
n "pllLocked"
t "std_ulogic"
o 9
suid 9,0
)
)
)
*64 (CptPort
uid 319,0
ps "OnEdgeStrategy"
shape (Triangle
uid 320,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "45250,14625,46000,15375"
)
tg (CPTG
uid 321,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 322,0
va (VaSet
font "Verdana,8,0"
)
xt "47000,14500,51600,15500"
st "clkIn100M"
blo "47000,15300"
)
)
thePort (LogicalPort
lang 11
decl (Decl
n "clkIn100M"
t "std_ulogic"
o 1
suid 10,0
)
)
)
]
shape (Rectangle
uid 324,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "46000,14000,58000,22000"
)
oxt "20000,20000,32000,28000"
ttg (MlTextGroup
uid 325,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*65 (Text
uid 326,0
va (VaSet
font "Verdana,8,1"
)
xt "54400,11000,58100,12000"
st "Lattice"
blo "54400,11800"
tm "BdLibraryNameMgr"
)
*66 (Text
uid 327,0
va (VaSet
font "Verdana,8,1"
)
xt "54400,12000,56200,13000"
st "pll"
blo "54400,12800"
tm "CptNameMgr"
)
*67 (Text
uid 328,0
va (VaSet
font "Verdana,8,1"
)
xt "54400,13000,57200,14000"
st "I_pll"
blo "54400,13800"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 329,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 330,0
text (MLText
uid 331,0
va (VaSet
font "Courier New,8,0"
)
xt "22000,-55200,22000,-55200"
)
header ""
)
elements [
]
)
viewicon (ZoomableIcon
uid 332,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "46250,20250,47750,21750"
iconName "VhdlFileViewIcon.png"
iconMaskName "VhdlFileViewIcon.msk"
ftype 10
)
ordering 1
viewiconposition 0
portVis (PortSigDisplay
)
archFileType "UNKNOWN"
)
*68 (Net
uid 339,0
lang 11
decl (Decl
n "clk_sys"
t "std_ulogic"
o 8
suid 9,0
)
declText (MLText
uid 340,0
va (VaSet
font "Courier New,8,0"
)
xt "2000,17200,19500,18000"
st "SIGNAL clk_sys      : std_ulogic
"
)
)
*69 (HdlText
uid 341,0
optionalChildren [
*70 (EmbeddedText
uid 346,0
commentText (CommentText
uid 347,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 348,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineStyle 2
)
xt "33000,17000,39000,19000"
)
oxt "0,0,18000,5000"
text (MLText
uid 349,0
va (VaSet
)
xt "33200,17200,38700,18400"
st "
logic0 <= '0';
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 2000
visibleWidth 6000
)
)
)
]
shape (Rectangle
uid 342,0
va (VaSet
vasetType 1
fg "65535,65535,32768"
)
xt "32000,16000,40000,20000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 343,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*71 (Text
uid 344,0
va (VaSet
)
xt "32400,20000,35000,21200"
st "eb6"
blo "32400,21000"
tm "HdlTextNameMgr"
)
*72 (Text
uid 345,0
va (VaSet
)
xt "32400,21000,33800,22200"
st "6"
blo "32400,22000"
tm "HdlTextNumberMgr"
)
]
)
)
*73 (Net
uid 370,0
lang 11
decl (Decl
n "logic0"
t "std_ulogic"
o 9
suid 11,0
)
declText (MLText
uid 371,0
va (VaSet
font "Courier New,8,0"
)
xt "2000,18000,19500,18800"
st "SIGNAL logic0       : std_ulogic
"
)
)
*74 (Net
uid 376,0
decl (Decl
n "resetSynch_n"
t "std_ulogic"
o 5
suid 12,0
)
declText (MLText
uid 377,0
va (VaSet
font "Courier New,8,0"
)
xt "2000,22400,19500,23200"
st "SIGNAL resetSynch_n : std_ulogic
"
)
)
*75 (Wire
uid 223,0
shape (OrthoPolyLine
uid 224,0
va (VaSet
vasetType 3
)
xt "43000,26000,48000,26000"
pts [
"48000,26000"
"43000,26000"
]
)
start &26
end &14
sat 32
eat 2
stc 0
sf 1
si 0
tg (WTG
uid 227,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 228,0
va (VaSet
font "Verdana,12,0"
)
xt "44000,24600,48400,26000"
st "logic1"
blo "44000,25800"
tm "WireNameMgr"
)
)
on &53
)
*76 (Wire
uid 229,0
shape (OrthoPolyLine
uid 230,0
va (VaSet
vasetType 3
)
xt "46000,30000,48000,30000"
pts [
"46000,30000"
"48000,30000"
]
)
end &27
sat 16
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 233,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 234,0
va (VaSet
font "Verdana,12,0"
)
xt "44000,28600,47800,30000"
st "clock"
blo "44000,29800"
tm "WireNameMgr"
)
)
on &51
)
*77 (Wire
uid 235,0
shape (OrthoPolyLine
uid 236,0
va (VaSet
vasetType 3
)
xt "54000,26000,58092,26000"
pts [
"54000,26000"
"58092,26000"
]
)
start &30
end &35
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 237,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 238,0
va (VaSet
font "Verdana,12,0"
)
xt "53000,24600,63200,26000"
st "resetSynch_n"
blo "53000,25800"
tm "WireNameMgr"
)
)
on &74
)
*78 (Wire
uid 239,0
shape (OrthoPolyLine
uid 240,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "87750,22000,95000,22000"
pts [
"87750,22000"
"95000,22000"
]
)
start &42
end &48
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 241,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 242,0
va (VaSet
font "Verdana,12,0"
)
xt "90000,20700,96600,22100"
st "countOut"
blo "90000,21900"
tm "WireNameMgr"
)
)
on &54
)
*79 (Wire
uid 243,0
shape (OrthoPolyLine
uid 244,0
va (VaSet
vasetType 3
)
xt "31000,34000,36092,34000"
pts [
"31000,34000"
"36092,34000"
]
)
start &12
end &19
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
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sat 32
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lineColor "26368,26368,26368"
lineStyle 2
lineWidth 3
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xt "0,0,20000,20000"
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title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
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xt "0,-1300,18500,-100"
st "g0: FOR i IN 0 TO n GENERATE"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1850,1650"
)
num (Text
va (VaSet
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xt "250,250,1650,1450"
st "1"
blo "250,1250"
tm "FrameSeqNumMgr"
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)
decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
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font "Verdana,9,1"
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xt "11200,20000,22000,21200"
st "Frame Declarations"
blo "11200,21000"
)
*117 (MLText
va (VaSet
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xt "11200,21200,11200,21200"
tm "BdFrameDeclTextMgr"
)
]
)
)
defaultBlockFrame (Frame
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "26368,26368,26368"
lineStyle 1
lineWidth 3
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xt "0,0,20000,20000"
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title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
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xt "0,-1300,11000,-100"
st "b0: BLOCK (guard)"
tm "FrameTitleTextMgr"
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seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
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vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1850,1650"
)
num (Text
va (VaSet
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xt "250,250,1650,1450"
st "1"
blo "250,1250"
tm "FrameSeqNumMgr"
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)
decls (MlTextGroup
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stg "VerticalLayoutStrategy"
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xt "11200,20000,22000,21200"
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blo "11200,21000"
)
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va (VaSet
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tm "BdFrameDeclTextMgr"
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defaultSaCptPort (CptPort
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shape (Triangle
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va (VaSet
vasetType 1
fg "0,65535,0"
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xt "0,0,750,750"
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tg (CPTG
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stg "VerticalLayoutStrategy"
f (Text
va (VaSet
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st "Port"
blo "0,1750"
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)
thePort (LogicalPort
lang 11
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultSaCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
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vasetType 1
fg "65535,65535,65535"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
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st "Port"
blo "0,1750"
)
)
thePort (LogicalPort
lang 11
m 3
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultDeclText (MLText
va (VaSet
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)
archDeclarativeBlock (BdArchDeclBlock
uid 1,0
stg "BdArchDeclBlockLS"
declLabel (Text
uid 2,0
va (VaSet
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xt "0,8000,7400,9200"
st "Declarations"
blo "0,9000"
)
portLabel (Text
uid 3,0
va (VaSet
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xt "0,9200,3700,10400"
st "Ports:"
blo "0,10200"
)
preUserLabel (Text
uid 4,0
va (VaSet
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xt "0,14000,5200,15200"
st "Pre User:"
blo "0,15000"
)
preUserText (MLText
uid 5,0
va (VaSet
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xt "2000,15200,24000,16000"
st "constant pipelineStageNb: positive := 5;"
tm "BdDeclarativeTextMgr"
)
diagSignalLabel (Text
uid 6,0
va (VaSet
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xt "0,16000,9500,17200"
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blo "0,17000"
)
postUserLabel (Text
uid 7,0
va (VaSet
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font "Verdana,9,1"
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xt "0,8000,6400,9200"
st "Post User:"
blo "0,9000"
)
postUserText (MLText
uid 8,0
va (VaSet
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font "Courier New,8,0"
)
xt "0,8000,0,8000"
tm "BdDeclarativeTextMgr"
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commonDM (CommonDM
ldm (LogicalDM
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usingSuid 1
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uid 54,0
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*122 (TitleRowHdr
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*123 (FilterRowHdr
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*124 (RefLabelColHdr
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*125 (RowExpandColHdr
tm "RowExpandColHdrMgr"
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*126 (GroupColHdr
tm "GroupColHdrMgr"
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*127 (NameColHdr
tm "BlockDiagramNameColHdrMgr"
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*128 (ModeColHdr
tm "BlockDiagramModeColHdrMgr"
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*129 (TypeColHdr
tm "BlockDiagramTypeColHdrMgr"
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*130 (BoundsColHdr
tm "BlockDiagramBoundsColHdrMgr"
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*131 (InitColHdr
tm "BlockDiagramInitColHdrMgr"
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*132 (EolColHdr
tm "BlockDiagramEolColHdrMgr"
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uid 275,0
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*138 (LeafLogPort
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*139 (LeafLogPort
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m 4
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pdm (PhysicalDM
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editShortBounds 1
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optionalChildren [
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sheetRow (SheetRow
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groupVa (MVa
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fixedCol 4
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genericsCommonDM (CommonDM
ldm (LogicalDM
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uid 83,0
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*169 (RowExpandColHdr
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*170 (GroupColHdr
tm "GroupColHdrMgr"
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*171 (NameColHdr
tm "GenericNameColHdrMgr"
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*172 (TypeColHdr
tm "GenericTypeColHdrMgr"
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*173 (InitColHdr
tm "GenericValueColHdrMgr"
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*174 (PragmaColHdr
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*175 (EolColHdr
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uid 469,0
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pdm (PhysicalDM
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groupVa (MVa
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uid 97,0
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sheetCol (SheetCol
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uid 82,0
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activeModelName "BlockDiag"
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