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tm "WireNameMgr"
)
)
)
*28 (Net
uid 717,0
decl (Decl
n "en"
t "std_ulogic"
o 2
suid 9,0
)
declText (MLText
uid 718,0
va (VaSet
)
xt "-1000,7500,10300,8700"
st "en       : std_ulogic"
)
)
*29 (PortIoIn
uid 725,0
shape (CompositeShape
uid 726,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 727,0
sl 0
ro 270
xt "-2000,30625,-500,31375"
)
(Line
uid 728,0
sl 0
ro 270
xt "-500,31000,0,31000"
pts [
"-500,31000"
"0,31000"
]
)
]
)
tg (WTG
uid 729,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 730,0
va (VaSet
isHidden 1
font "Arial,12,0"
)
xt "-4400,30300,-3000,31600"
st "en"
ju 2
blo "-3000,31300"
tm "WireNameMgr"
)
)
)
*30 (SaComponent
uid 916,0
optionalChildren [
*31 (CptPort
uid 908,0
ps "OnEdgeStrategy"
shape (Triangle
uid 909,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "48000,26625,48750,27375"
)
tg (CPTG
uid 910,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 911,0
va (VaSet
font "Arial,9,0"
)
xt "44000,26400,47000,27300"
st "square"
ju 2
blo "47000,27100"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "square"
t "unsigned"
b "(bitNb-1 DOWNTO 0)"
o 1
suid 1,0
)
)
)
*32 (CptPort
uid 912,0
ps "OnEdgeStrategy"
shape (Triangle
uid 913,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "31250,26625,32000,27375"
)
tg (CPTG
uid 914,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 915,0
va (VaSet
font "Arial,9,0"
)
xt "33000,26400,37000,27300"
st "sawtooth"
blo "33000,27100"
)
)
thePort (LogicalPort
decl (Decl
n "sawtooth"
t "unsigned"
b "(bitNb-1 DOWNTO 0)"
o 2
suid 2,0
)
)
)
]
shape (Rectangle
uid 917,0
va (VaSet
vasetType 1
fg "0,65535,0"
bg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "32000,23000,48000,31000"
)
oxt "32000,10000,48000,18000"
ttg (MlTextGroup
uid 918,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*33 (Text
uid 919,0
va (VaSet
font "Arial,9,1"
)
xt "32600,30800,41600,31700"
st "WaveformGenerator"
blo "32600,31500"
tm "BdLibraryNameMgr"
)
*34 (Text
uid 920,0
va (VaSet
font "Arial,9,1"
)
xt "32600,32000,41100,32900"
st "sawtoothToSquare"
blo "32600,32700"
tm "CptNameMgr"
)
*35 (Text
uid 921,0
va (VaSet
font "Arial,9,1"
)
xt "32600,33200,36600,34100"
st "I_square"
blo "32600,33900"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 922,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 923,0
text (MLText
uid 924,0
va (VaSet
)
xt "32000,34600,51100,35800"
st "bitNb = signalBitNb    ( positive )  "
)
header ""
)
elements [
(GiElement
name "bitNb"
type "positive"
value "signalBitNb"
)
]
)
ordering 1
portVis (PortSigDisplay
sTC 0
)
archFileType "UNKNOWN"
)
*36 (SaComponent
uid 977,0
optionalChildren [
*37 (CptPort
uid 969,0
ps "OnEdgeStrategy"
shape (Triangle
uid 970,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "48000,42625,48750,43375"
)
tg (CPTG
uid 971,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 972,0
va (VaSet
font "Arial,9,0"
)
xt "43000,42400,47000,43300"
st "triangle"
ju 2
blo "47000,43100"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "triangle"
t "unsigned"
b "(bitNb-1 DOWNTO 0)"
o 1
suid 1,0
)
)
)
*38 (CptPort
uid 973,0
ps "OnEdgeStrategy"
shape (Triangle
uid 974,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "31250,42625,32000,43375"
)
tg (CPTG
uid 975,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 976,0
va (VaSet
font "Arial,9,0"
)
xt "33000,42400,37000,43300"
st "sawtooth"
blo "33000,43100"
)
)
thePort (LogicalPort
decl (Decl
n "sawtooth"
t "unsigned"
b "(bitNb-1 DOWNTO 0)"
o 2
suid 2,0
)
)
)
]
shape (Rectangle
uid 978,0
va (VaSet
vasetType 1
fg "0,65535,0"
bg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "32000,39000,48000,47000"
)
oxt "32000,10000,48000,18000"
ttg (MlTextGroup
uid 979,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*39 (Text
uid 980,0
va (VaSet
font "Arial,9,1"
)
xt "32600,46800,41600,47700"
st "WaveformGenerator"
blo "32600,47500"
tm "BdLibraryNameMgr"
)
*40 (Text
uid 981,0
va (VaSet
font "Arial,9,1"
)
xt "32600,48000,42100,48900"
st "sawtoothToTriangle"
blo "32600,48700"
tm "CptNameMgr"
)
*41 (Text
uid 982,0
va (VaSet
font "Arial,9,1"
)
xt "32600,49200,35100,50100"
st "I_tri"
blo "32600,49900"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 983,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 984,0
text (MLText
uid 985,0
va (VaSet
)
xt "32000,50600,51100,51800"
st "bitNb = signalBitNb    ( positive )  "
)
header ""
)
elements [
(GiElement
name "bitNb"
type "positive"
value "signalBitNb"
)
]
)
ordering 1
portVis (PortSigDisplay
sTC 0
)
archFileType "UNKNOWN"
)
*42 (SaComponent
uid 1011,0
optionalChildren [
*43 (CptPort
uid 1003,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1004,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "72000,42625,72750,43375"
)
tg (CPTG
uid 1005,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1006,0
va (VaSet
font "Arial,9,0"
)
xt "67500,42400,71000,43300"
st "polygon"
ju 2
blo "71000,43100"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "polygon"
t "unsigned"
b "(bitNb-1 DOWNTO 0)"
o 1
suid 1,0
)
)
)
*44 (CptPort
uid 1007,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1008,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "55250,42625,56000,43375"
)
tg (CPTG
uid 1009,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1010,0
va (VaSet
font "Arial,9,0"
)
xt "57000,42400,61000,43300"
st "triangle"
blo "57000,43100"
)
)
thePort (LogicalPort
decl (Decl
n "triangle"
t "unsigned"
b "(bitNb-1 DOWNTO 0)"
o 2
suid 2,0
)
)
)
]
shape (Rectangle
uid 1012,0
va (VaSet
vasetType 1
fg "0,65535,0"
bg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "56000,39000,72000,47000"
)
oxt "32000,10000,48000,18000"
ttg (MlTextGroup
uid 1013,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*45 (Text
uid 1014,0
va (VaSet
font "Arial,9,1"
)
xt "56600,46800,65600,47700"
st "WaveformGenerator"
blo "56600,47500"
tm "BdLibraryNameMgr"
)
*46 (Text
uid 1015,0
va (VaSet
font "Arial,9,1"
)
xt "56600,48000,65600,48900"
st "triangleToPolygon"
blo "56600,48700"
tm "CptNameMgr"
)
*47 (Text
uid 1016,0
va (VaSet
font "Arial,9,1"
)
xt "56600,49200,59600,50100"
st "I_poly"
blo "56600,49900"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 1017,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 1018,0
text (MLText
uid 1019,0
va (VaSet
)
xt "56000,50600,75100,51800"
st "bitNb = signalBitNb    ( positive )  "
)
header ""
)
elements [
(GiElement
name "bitNb"
type "positive"
value "signalBitNb"
)
]
)
ordering 1
portVis (PortSigDisplay
sTC 0
)
archFileType "UNKNOWN"
)
*48 (SaComponent
uid 1036,0
optionalChildren [
*49 (CptPort
uid 1020,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1021,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "79250,46625,80000,47375"
)
tg (CPTG
uid 1022,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1023,0
va (VaSet
font "Arial,9,0"
)
xt "81000,46400,83700,47600"
st "clock"
blo "81000,47300"
)
)
thePort (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
o 2
suid 1,0
)
)
)
*50 (CptPort
uid 1024,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1025,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "96000,42625,96750,43375"
)
tg (CPTG
uid 1026,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1027,0
va (VaSet
font "Arial,9,0"
)
xt "89200,42400,95000,43600"
st "lowpassOut"
ju 2
blo "95000,43300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "lowpassOut"
t "unsigned"
b "(signalBitNb-1 DOWNTO 0)"
o 1
suid 2,0
)
)
)
*51 (CptPort
uid 1028,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1029,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "79250,48625,80000,49375"
)
tg (CPTG
uid 1030,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1031,0
va (VaSet
font "Arial,9,0"
)
xt "81000,48400,83600,49600"
st "reset"
blo "81000,49300"
)
)
thePort (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 3
suid 3,0
)
)
)
*52 (CptPort
uid 1032,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1033,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "79250,42625,80000,43375"
)
tg (CPTG
uid 1034,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1035,0
va (VaSet
font "Arial,9,0"
)
xt "81000,42400,85600,43600"
st "lowpassIn"
blo "81000,43300"
)
)
thePort (LogicalPort
decl (Decl
n "lowpassIn"
t "unsigned"
b "(signalBitNb-1 DOWNTO 0)"
o 4
suid 4,0
)
)
)
]
shape (Rectangle
uid 1037,0
va (VaSet
vasetType 1
fg "0,65535,0"
bg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "80000,39000,96000,51000"
)
oxt "32000,10000,48000,22000"
ttg (MlTextGroup
uid 1038,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*53 (Text
uid 1039,0
va (VaSet
font "Arial,9,1"
)
xt "80600,50800,89600,51700"
st "WaveformGenerator"
blo "80600,51500"
tm "BdLibraryNameMgr"
)
*54 (Text
uid 1040,0
va (VaSet
font "Arial,9,1"
)
xt "80600,52000,84100,52900"
st "lowpass"
blo "80600,52700"
tm "CptNameMgr"
)
*55 (Text
uid 1041,0
va (VaSet
font "Arial,9,1"
)
xt "80600,53200,82600,54100"
st "I_lp"
blo "80600,53900"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 1042,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 1043,0
text (MLText
uid 1044,0
va (VaSet
)
xt "80000,54600,102900,57000"
st "signalBitNb = signalBitNb    ( positive )  
shiftBitNb  = 5              ( positive )  
"
)
header ""
)
elements [
(GiElement
name "signalBitNb"
type "positive"
value "signalBitNb"
)
(GiElement
name "shiftBitNb"
type "positive"
value "5"
)
]
)
ordering 1
portVis (PortSigDisplay
sTC 0
)
archFileType "UNKNOWN"
)
*56 (SaComponent
uid 1227,0
optionalChildren [
*57 (CptPort
uid 1207,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1208,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "7250,32625,8000,33375"
)
tg (CPTG
uid 1209,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1210,0
va (VaSet
font "Arial,9,0"
)
xt "9000,32400,11500,33300"
st "clock"
blo "9000,33100"
)
)
thePort (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
o 2
suid 1,0
)
)
)
*58 (CptPort
uid 1211,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1212,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "24000,26625,24750,27375"
)
tg (CPTG
uid 1213,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1214,0
va (VaSet
font "Arial,9,0"
)
xt "19000,26400,23000,27300"
st "sawtooth"
ju 2
blo "23000,27100"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "sawtooth"
t "unsigned"
b "(bitNb-1 DOWNTO 0)"
o 1
suid 2,0
)
)
)
*59 (CptPort
uid 1215,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1216,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "7250,34625,8000,35375"
)
tg (CPTG
uid 1217,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1218,0
va (VaSet
font "Arial,9,0"
)
xt "9000,34400,11500,35300"
st "reset"
blo "9000,35100"
)
)
thePort (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 3
suid 3,0
)
)
)
*60 (CptPort
uid 1219,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1220,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "7250,26625,8000,27375"
)
tg (CPTG
uid 1221,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1222,0
va (VaSet
font "Arial,9,0"
)
xt "9000,26400,11000,27300"
st "step"
blo "9000,27100"
)
)
thePort (LogicalPort
decl (Decl
n "step"
t "unsigned"
b "(bitNb-1 DOWNTO 0)"
o 4
suid 4,0
)
)
)
*61 (CptPort
uid 1223,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1224,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "7250,30625,8000,31375"
)
tg (CPTG
uid 1225,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1226,0
va (VaSet
font "Arial,9,0"
)
xt "9000,30400,10000,31300"
st "en"
blo "9000,31100"
)
)
thePort (LogicalPort
decl (Decl
n "en"
t "std_ulogic"
o 5
suid 5,0
)
)
)
]
shape (Rectangle
uid 1228,0
va (VaSet
vasetType 1
fg "0,65535,0"
bg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "8000,23000,24000,37000"
)
oxt "32000,8000,48000,22000"
ttg (MlTextGroup
uid 1229,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*62 (Text
uid 1230,0
va (VaSet
font "Arial,9,1"
)
xt "8600,36800,17600,37700"
st "WaveformGenerator"
blo "8600,37500"
tm "BdLibraryNameMgr"
)
*63 (Text
uid 1231,0
va (VaSet
font "Arial,9,1"
)
xt "8600,37700,14600,38600"
st "sawtoothGen"
blo "8600,38400"
tm "CptNameMgr"
)
*64 (Text
uid 1232,0
va (VaSet
font "Arial,9,1"
)
xt "8600,38600,11100,39500"
st "I_saw"
blo "8600,39300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 1233,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 1234,0
text (MLText
uid 1235,0
va (VaSet
)
xt "8000,40600,27100,41800"
st "bitNb = phaseBitNb    ( positive )  "
)
header ""
)
elements [
(GiElement
name "bitNb"
type "positive"
value "phaseBitNb"
)
]
)
ordering 1
portVis (PortSigDisplay
sTC 0
)
archFileType "UNKNOWN"
)
*65 (Wire
uid 15,0
shape (OrthoPolyLine
uid 16,0
va (VaSet
vasetType 3
)
xt "0,33000,7250,33000"
pts [
"0,33000"
"7250,33000"
]
)
start &1
end &57
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 19,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 20,0
va (VaSet
font "Arial,12,0"
)
xt "0,31600,3500,32900"
st "clock"
blo "0,32600"
tm "WireNameMgr"
)
)
on &2
)
*66 (Wire
uid 184,0
shape (OrthoPolyLine
uid 185,0
va (VaSet
vasetType 3
)
xt "76000,47000,79250,47000"
pts [
"76000,47000"
"79250,47000"
]
)
end &49
sat 16
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 190,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 191,0
va (VaSet
font "Arial,12,0"
)
xt "76000,45600,79500,46900"
st "clock"
blo "76000,46600"
tm "WireNameMgr"
)
)
on &2
)
*67 (Wire
uid 192,0
shape (OrthoPolyLine
uid 193,0
va (VaSet
vasetType 3
)
xt "76000,49000,79250,49000"
pts [
"76000,49000"
"79250,49000"
]
)
end &51
sat 16
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 198,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 199,0
va (VaSet
font "Arial,12,0"
)
xt "76000,47600,79500,48900"
st "reset"
blo "76000,48600"
tm "WireNameMgr"
)
)
on &4
)
*68 (Wire
uid 237,0
shape (OrthoPolyLine
uid 238,0
va (VaSet
vasetType 3
)
xt "0,35000,7250,35000"
pts [
"0,35000"
"7250,35000"
]
)
start &3
end &59
ss 0
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 243,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 244,0
va (VaSet
font "Arial,12,0"
)
xt "0,33600,3500,34900"
st "reset"
blo "0,34600"
tm "WireNameMgr"
)
)
on &4
)
*69 (Wire
uid 319,0
shape (OrthoPolyLine
uid 320,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "0,27000,7250,27000"
pts [
"7250,27000"
"0,27000"
]
)
start &60
end &22
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
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ps "OnConnectorStrategy"
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start &58
end &32
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
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st "sawtooth"
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end &44
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
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stg "STSignalDisplayStrategy"
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st "triangle"
blo "50000,42600"
tm "WireNameMgr"
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)
on &18
)
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shape (OrthoPolyLine
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xt "28000,27000,31250,43000"
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start &71
end &38
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
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xt "24250,41600,29850,42900"
st "sawtooth"
blo "24250,42600"
tm "WireNameMgr"
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)
on &17
)
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uid 480,0
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start &31
end &24
sat 32
eat 32
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st 0
sf 1
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ps "ConnStartEndStrategy"
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blo "50750,26600"
tm "WireNameMgr"
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)
on &19
)
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end &52
sat 32
eat 32
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st 0
sf 1
si 0
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stg "STSignalDisplayStrategy"
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end &27
sat 32
eat 32
sty 1
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st 0
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
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tm "WireNameMgr"
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end &23
sat 32
eat 32
sty 1
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st 0
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si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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tm "WireNameMgr"
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)
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start &74
end &25
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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tm "WireNameMgr"
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on &18
)
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va (VaSet
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xt "76000,35000,80000,43000"
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)
start &78
end &26
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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st "polygon"
blo "76000,34600"
tm "WireNameMgr"
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)
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va (VaSet
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xt "0,31000,7250,31000"
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start &61
end &29
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
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va (VaSet
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tm "WireNameMgr"
)
)
on &28
)
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tm "BdCompilerDirectivesTextMgr"
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Text
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tm "CommentText"
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xt "0,0,1500,1750"
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Text
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xt "0,0,20000,20000"
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xt "1000,1000,4400,2200"
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blo "1000,2000"
tm "PanelText"
)
)
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xt "0,0,8000,10000"
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ttg (MlTextGroup
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tm "InstanceNameMgr"
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matrix (Matrix
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xt "1700,13200,1700,13200"
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header ""
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elements [
]
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)
defaultMWComponent (MWC
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xt "0,0,8000,10000"
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ttg (MlTextGroup
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xt "1000,3500,3300,4500"
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xt "1000,4500,7000,5500"
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*99 (Text
va (VaSet
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xt "1000,5500,1600,6500"
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tm "InstanceNameMgr"
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text (MLText
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xt "-6000,1500,-6000,1500"
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header ""
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elements [
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ptn "String"
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visOptions (mwParamsVisibilityOptions
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vasetType 1
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xt "0,0,8000,10000"
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ttg (MlTextGroup
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tm "BdLibraryNameMgr"
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va (VaSet
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xt "1250,4500,6750,5500"
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tm "CptNameMgr"
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va (VaSet
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xt "1250,5500,1850,6500"
st "I0"
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tm "InstanceNameMgr"
)
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ga (GenericAssociation
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matrix (Matrix
text (MLText
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xt "-5750,1500,-5750,1500"
)
header ""
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elements [
]
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archFileType "UNKNOWN"
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xt "0,0,8000,10000"
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ttg (MlTextGroup
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va (VaSet
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xt "950,4500,7050,5500"
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blo "950,5300"
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va (VaSet
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xt "950,5500,1550,6500"
st "I0"
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tm "InstanceNameMgr"
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ga (GenericAssociation
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matrix (Matrix
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xt "-6050,1500,-6050,1500"
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header ""
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elements [
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xt "-50,0,8050,10000"
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ttg (MlTextGroup
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xt "450,3500,2750,4500"
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*107 (Text
va (VaSet
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*108 (Text
va (VaSet
)
xt "450,5500,1050,6500"
st "I0"
blo "450,6300"
tm "InstanceNameMgr"
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)
ga (GenericAssociation
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matrix (Matrix
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xt "-6550,1500,-6550,1500"
)
header ""
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entityPath ""
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defaultHdlText (HdlText
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xt "0,0,8000,10000"
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ttg (MlTextGroup
ps "CenterOffsetStrategy"
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va (VaSet
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xt "3400,4000,4600,5000"
st "eb1"
blo "3400,4800"
tm "HdlTextNameMgr"
)
*110 (Text
va (VaSet
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xt "3400,5000,3800,6000"
st "1"
blo "3400,5800"
tm "HdlTextNumberMgr"
)
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)
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commentText (CommentText
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shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
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xt "0,0,18000,5000"
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text (MLText
va (VaSet
)
xt "200,200,3200,1400"
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Text
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tm "HdlTextMgr"
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visibleHeight 4600
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)
)
defaultGlobalConnector (GlobalConnector
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vasetType 1
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xt "-1000,-1000,1000,1000"
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name (Text
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)
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ps "OnConnectorStrategy"
shape (Line2D
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va (VaSet
vasetType 1
)
xt "0,0,1000,1000"
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xt "-400,-400,400,400"
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)
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xt "500,-375,2000,375"
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xt "0,0,500,0"
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tg (WTG
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tm "WireNameMgr"
)
)
)
defaultBundle (Bundle
shape (OrthoPolyLine
va (VaSet
vasetType 3
lineStyle 3
lineWidth 1
)
pts [
"0,0"
"0,0"
]
)
ss 0
es 0
sat 32
eat 32
textGroup (BiTextGroup
ps "ConnStartEndStrategy"
stg "VerticalLayoutStrategy"
first (Text
va (VaSet
)
xt "0,0,2600,1000"
st "bundle0"
blo "0,800"
tm "BundleNameMgr"
)
second (MLText
va (VaSet
)
xt "0,1000,1500,2200"
st "()"
tm "BundleContentsMgr"
)
)
bundleNet &0
)
defaultPortMapFrame (PortMapFrame
ps "PortMapFrameStrategy"
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,50000"
lineWidth 2
)
xt "0,0,10000,12000"
)
portMapText (BiTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
first (MLText
va (VaSet
)
xt "0,0,5000,1200"
st "Auto list"
)
second (MLText
va (VaSet
)
xt "0,1000,9600,2200"
st "User defined list"
tm "PortMapTextMgr"
)
)
)
defaultGenFrame (Frame
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "28160,28160,28160"
lineStyle 2
lineWidth 3
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
)
xt "0,-1100,18500,100"
st "g0: FOR i IN 0 TO n GENERATE"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1050,1450"
)
num (Text
va (VaSet
)
xt "350,250,750,1250"
st "1"
blo "350,1050"
tm "FrameSeqNumMgr"
)
)
decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
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va (VaSet
font "Arial,8,1"
)
xt "14100,20000,22000,21000"
st "Frame Declarations"
blo "14100,20800"
)
*112 (MLText
va (VaSet
)
xt "14100,21000,14100,21000"
tm "BdFrameDeclTextMgr"
)
]
)
)
defaultBlockFrame (Frame
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "28160,28160,28160"
lineStyle 1
lineWidth 3
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
)
xt "0,-1100,11000,100"
st "b0: BLOCK (guard)"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1050,1450"
)
num (Text
va (VaSet
)
xt "350,250,750,1250"
st "1"
blo "350,1050"
tm "FrameSeqNumMgr"
)
)
decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
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va (VaSet
font "Arial,8,1"
)
xt "14100,20000,22000,21000"
st "Frame Declarations"
blo "14100,20800"
)
*114 (MLText
va (VaSet
)
xt "14100,21000,14100,21000"
tm "BdFrameDeclTextMgr"
)
]
)
style 3
)
defaultSaCptPort (CptPort
ps "OnEdgeStrategy"
shape (Triangle
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1400,1750"
st "Port"
blo "0,1550"
)
)
thePort (LogicalPort
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultSaCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1400,1750"
st "Port"
blo "0,1550"
)
)
thePort (LogicalPort
m 3
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultDeclText (MLText
va (VaSet
)
)
archDeclarativeBlock (BdArchDeclBlock
uid 1,0
stg "BdArchDeclBlockLS"
declLabel (Text
uid 2,0
va (VaSet
font "Arial,8,1"
)
xt "-3000,4800,3500,5700"
st "Declarations"
blo "-3000,5500"
)
portLabel (Text
uid 3,0
va (VaSet
font "Arial,8,1"
)
xt "-3000,5700,0,6600"
st "Ports:"
blo "-3000,6400"
)
preUserLabel (Text
uid 4,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "-3000,4800,1500,5700"
st "Pre User:"
blo "-3000,5500"
)
preUserText (MLText
uid 5,0
va (VaSet
isHidden 1
)
xt "-3000,4800,-3000,4800"
tm "BdDeclarativeTextMgr"
)
diagSignalLabel (Text
uid 6,0
va (VaSet
font "Arial,8,1"
)
xt "-3000,14700,5500,15600"
st "Diagram Signals:"
blo "-3000,15400"
)
postUserLabel (Text
uid 7,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "-3000,4800,2500,5700"
st "Post User:"
blo "-3000,5500"
)
postUserText (MLText
uid 8,0
va (VaSet
isHidden 1
)
xt "-3000,4800,-3000,4800"
tm "BdDeclarativeTextMgr"
)
)
commonDM (CommonDM
ldm (LogicalDM
suid 9,0
usingSuid 1
emptyRow *115 (LEmptyRow
)
uid 787,0
optionalChildren [
*116 (RefLabelRowHdr
)
*117 (TitleRowHdr
)
*118 (FilterRowHdr
)
*119 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*120 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*121 (GroupColHdr
tm "GroupColHdrMgr"
)
*122 (NameColHdr
tm "BlockDiagramNameColHdrMgr"
)
*123 (ModeColHdr
tm "BlockDiagramModeColHdrMgr"
)
*124 (TypeColHdr
tm "BlockDiagramTypeColHdrMgr"
)
*125 (BoundsColHdr
tm "BlockDiagramBoundsColHdrMgr"
)
*126 (InitColHdr
tm "BlockDiagramInitColHdrMgr"
)
*127 (EolColHdr
tm "BlockDiagramEolColHdrMgr"
)
*128 (LeafLogPort
port (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
o 1
suid 1,0
)
)
uid 768,0
)
*129 (LeafLogPort
port (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 3
suid 2,0
)
)
uid 770,0
)
*130 (LeafLogPort
port (LogicalPort
decl (Decl
n "step"
t "unsigned"
b "(phaseBitNb-1 DOWNTO 0)"
o 4
suid 3,0
)
)
uid 772,0
)
*131 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "sawtooth"
t "unsigned"
b "(phaseBitNb-1 DOWNTO 0)"
o 6
suid 4,0
)
)
uid 774,0
)
*132 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "triangle"
t "unsigned"
b "(signalBitNb-1 DOWNTO 0)"
o 9
suid 5,0
)
)
uid 776,0
)
*133 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "square"
t "unsigned"
b "(signalBitNb-1 DOWNTO 0)"
o 8
suid 6,0
)
)
uid 778,0
)
*134 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "polygon"
t "unsigned"
b "(signalBitNb-1 DOWNTO 0)"
o 5
suid 7,0
)
)
uid 780,0
)
*135 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "sine"
t "unsigned"
b "(signalBitNb-1 DOWNTO 0)"
o 7
suid 8,0
)
)
uid 782,0
)
*136 (LeafLogPort
port (LogicalPort
decl (Decl
n "en"
t "std_ulogic"
o 2
suid 9,0
)
)
uid 784,0
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 800,0
optionalChildren [
*137 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *138 (MRCItem
litem &115
pos 9
dimension 20
)
uid 802,0
optionalChildren [
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litem &116
pos 0
dimension 20
uid 803,0
)
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litem &117
pos 1
dimension 23
uid 804,0
)
*141 (MRCItem
litem &118
pos 2
hidden 1
dimension 20
uid 805,0
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litem &128
pos 0
dimension 20
uid 769,0
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litem &129
pos 1
dimension 20
uid 771,0
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litem &130
pos 2
dimension 20
uid 773,0
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litem &131
pos 3
dimension 20
uid 775,0
)
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litem &132
pos 4
dimension 20
uid 777,0
)
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litem &133
pos 5
dimension 20
uid 779,0
)
*148 (MRCItem
litem &134
pos 6
dimension 20
uid 781,0
)
*149 (MRCItem
litem &135
pos 7
dimension 20
uid 783,0
)
*150 (MRCItem
litem &136
pos 8
dimension 20
uid 785,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 806,0
optionalChildren [
*151 (MRCItem
litem &119
pos 0
dimension 20
uid 807,0
)
*152 (MRCItem
litem &121
pos 1
dimension 50
uid 808,0
)
*153 (MRCItem
litem &122
pos 2
dimension 100
uid 809,0
)
*154 (MRCItem
litem &123
pos 3
dimension 50
uid 810,0
)
*155 (MRCItem
litem &124
pos 4
dimension 100
uid 811,0
)
*156 (MRCItem
litem &125
pos 5
dimension 100
uid 812,0
)
*157 (MRCItem
litem &126
pos 6
dimension 50
uid 813,0
)
*158 (MRCItem
litem &127
pos 7
dimension 80
uid 814,0
)
]
)
fixedCol 4
fixedRow 2
name "Ports"
uid 801,0
vaOverrides [
]
)
]
)
uid 786,0
)
genericsCommonDM (CommonDM
ldm (LogicalDM
emptyRow *159 (LEmptyRow
)
uid 816,0
optionalChildren [
*160 (RefLabelRowHdr
)
*161 (TitleRowHdr
)
*162 (FilterRowHdr
)
*163 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*164 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*165 (GroupColHdr
tm "GroupColHdrMgr"
)
*166 (NameColHdr
tm "GenericNameColHdrMgr"
)
*167 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*168 (InitColHdr
tm "GenericValueColHdrMgr"
)
*169 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
)
*170 (EolColHdr
tm "GenericEolColHdrMgr"
)
*171 (LogGeneric
generic (GiElement
name "phaseBitNb"
type "positive"
value "16"
)
uid 905,0
)
*172 (LogGeneric
generic (GiElement
name "signalBitNb"
type "positive"
value "16"
)
uid 907,0
)
]
)
pdm (PhysicalDM
uid 828,0
optionalChildren [
*173 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
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font "Tahoma,10,0"
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cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *174 (MRCItem
litem &159
pos 2
dimension 20
)
uid 830,0
optionalChildren [
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litem &160
pos 0
dimension 20
uid 831,0
)
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litem &161
pos 1
dimension 23
uid 832,0
)
*177 (MRCItem
litem &162
pos 2
hidden 1
dimension 20
uid 833,0
)
*178 (MRCItem
litem &171
pos 0
dimension 20
uid 904,0
)
*179 (MRCItem
litem &172
pos 1
dimension 20
uid 906,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 834,0
optionalChildren [
*180 (MRCItem
litem &163
pos 0
dimension 20
uid 835,0
)
*181 (MRCItem
litem &165
pos 1
dimension 50
uid 836,0
)
*182 (MRCItem
litem &166
pos 2
dimension 100
uid 837,0
)
*183 (MRCItem
litem &167
pos 3
dimension 100
uid 838,0
)
*184 (MRCItem
litem &168
pos 4
dimension 50
uid 839,0
)
*185 (MRCItem
litem &169
pos 5
dimension 50
uid 840,0
)
*186 (MRCItem
litem &170
pos 6
dimension 80
uid 841,0
)
]
)
fixedCol 3
fixedRow 2
name "Ports"
uid 829,0
vaOverrides [
]
)
]
)
uid 815,0
type 1
)
activeModelName "BlockDiag"
)
