23 lines
		
	
	
		
			502 B
		
	
	
	
		
			Coq
		
	
	
	
	
	
			
		
		
	
	
			23 lines
		
	
	
		
			502 B
		
	
	
	
		
			Coq
		
	
	
	
	
	
| FILE_NAMING_RULE: %(module_name).v
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| DESCRIPTION_START
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| Template for the creation of Verilog Module files.
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| This template was migrated from header preferences created in a
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| previous version of HDL Designer.
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| DESCRIPTION_END
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| // 
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| //
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| // Module %(library).%(unit).%(view)
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| //
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| // Created:
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| //          by - %(user).%(group) (%(host))
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| //          at - %(time) %(date)
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| //
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| // Generated by Mentor Graphics' HDL Designer(TM) %(version)
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| //
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| // 
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| %(moduleBody)
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| // 
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| // ### Please start your Verilog code here ### 
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| 
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| endmodule
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