Klagarge/SEm-ExamMidterm2024
Archived
1
0
Fork 0
Code Issues Pull Requests Activity

Initial commit

Browse Source
This commit is contained in:
Rémi Heredero
2024-03-22 13:16:48 +01:00
commit 8b2f630f7b
499 changed files with 87136 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5492
Prefs/hds_user-linux/v2018.1/hds_user_prefs Normal file
View File

File diff suppressed because it is too large Load Diff

39
Prefs/hds_user-linux/v2018.1/tasks/actel_place_and_route.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Actel Place and Route"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_actel.bmp"
hasBitmap 1
tooltip "Invokes the Actel Designer Place and Route tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"ActelPARInvoke"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

39
Prefs/hds_user-linux/v2018.1/tasks/altera_megawizard.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Altera MegaWizard"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_alteramegawizard.bmp"
hasBitmap 1
tooltip "Creates Altera Megawizard components"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
"\"%(p)\" %(library)"
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"AlteraMegaWizard"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

39
Prefs/hds_user-linux/v2018.1/tasks/altera_sopc_builder.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Altera SOPC Builder"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_alterasopc.bmp"
hasBitmap 1
tooltip "Invokes and imports files from Altera SOPC Builder"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"AlteraSOPC"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

39
Prefs/hds_user-linux/v2018.1/tasks/c_c_wrapper_generator.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "C/C++ Wrapper Generator"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_cwrapper.bmp"
hasBitmap 1
tooltip "Generates an HDL wrapper for a C/C++ view"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"CWrapperGen"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

43
Prefs/hds_user-linux/v2018.1/tasks/designchecker.tsk Normal file
View File

@@ -0,0 +1,43 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "DesignChecker"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_designanalyst.bmp"
hasBitmap 1
tooltip "Runs DesignChecker"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"1"
"customPrompt"
""
"forceGui"
"NO_FORCE"
"initialDir"
""
"noSettingsDlg"
"1"
"promptForRunSettings"
"0"
"runnableObject"
"HdsLintPlugin"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
)

57
Prefs/hds_user-linux/v2018.1/tasks/designchecker_flow.tsk Normal file
View File

@@ -0,0 +1,57 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "DesignChecker Flow"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_designanalyst.bmp"
hasBitmap 1
tooltip "Generate and runs DesignChecker"
taskSettings [
]
PreferedTasks [
]
onShortcutBar 1
onPulldownMenu 1
onToolbar 1
enabled 1
hierDepth 1
subTasks [
(HDSTaskRef
TaskName "Generate"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:Generate"
)
(HDSTaskRef
TaskName "DesignChecker"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"forceGui"
"NO_FORCE"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:DesignChecker"
)
]
)

39
Prefs/hds_user-linux/v2018.1/tasks/fpga_library_compile.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "FPGA Library Compile"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_fpgalibcomp.bmp"
hasBitmap 1
tooltip "Compiles Vendor Simulation Libraries"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"FpgaLibsComp"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

39
Prefs/hds_user-linux/v2018.1/tasks/fpga_technology_setup.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "FPGA Technology Setup"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_fpgatechsetup.bmp"
hasBitmap 1
tooltip "Sets the FPGA technology"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"FpgaTechSetup"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

41
Prefs/hds_user-linux/v2018.1/tasks/generate.tsk Normal file
View File

@@ -0,0 +1,41 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Generate"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_generate.bmp"
hasBitmap 1
tooltip "Performs generation of graphics files"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runMethod"
"gui"
"runnableObject"
"Generator"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 1
onPulldownMenu 1
onToolbar 1
enabled 1
hierDepth 1
)

72
Prefs/hds_user-linux/v2018.1/tasks/i_o_design_flow.tsk Normal file
View File

@@ -0,0 +1,72 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "I/O Design Flow"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_blpro.bmp"
hasBitmap 1
tooltip "Generate and runs BoardLink Pro to define pin assignments"
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
subTasks [
(HDSTaskRef
TaskName "Generate"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:Generate"
)
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "I/O Design"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_blpro.bmp"
hasBitmap 1
tooltip "Runs BoardLink Pro to define pin assignments"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"BoardLinkPro"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)
]
)

39
Prefs/hds_user-linux/v2018.1/tasks/lattice_place_and_route.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Lattice Place and Route"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_lattice.bmp"
hasBitmap 1
tooltip "Invokes the Lattice Place and Route tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"LatticePARInvoke"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

48
Prefs/hds_user-linux/v2018.1/tasks/modelsim_compile.tsk Normal file
View File

@@ -0,0 +1,48 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "ModelSim Compile"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_modelsim_compile.bmp"
hasBitmap 1
tooltip "Runs ModelSim compilation"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runMethod"
"gui"
"runnableObject"
"ModelSimCompiler"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
"TaskSetting"
(SettingsMap
settingsMap [
"exepath"
"%task_ModelSimPath"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
)

74
Prefs/hds_user-linux/v2018.1/tasks/modelsim_flow.tsk Normal file
View File

@@ -0,0 +1,74 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "ModelSim Flow"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_modelsim.bmp"
hasBitmap 1
tooltip "Generate and run entire ModelSim flow"
taskSettings [
]
PreferedTasks [
(preferedMap
preferedEnum 0
preferedSetting "/usr/opt/Modelsim/modeltech/bin"
)
(preferedMap
preferedEnum 2
preferedSetting "MODEL_SIM"
)
]
onShortcutBar 1
onPulldownMenu 1
onToolbar 1
enabled 1
hierDepth 1
subTasks [
(HDSTaskRef
TaskName "Generate"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:Generate"
)
(HDSTaskRef
TaskName "ModelSim Compile"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:ModelSim Compile"
)
(HDSTaskRef
TaskName "ModelSim Simulate"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
reffedTaskName "USER:ModelSim Simulate"
)
]
)

48
Prefs/hds_user-linux/v2018.1/tasks/modelsim_simulate.tsk Normal file
View File

@@ -0,0 +1,48 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "ModelSim Simulate"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_modelsim_invoke.bmp"
hasBitmap 1
tooltip "Invokes the ModelSim Simulator"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"1"
"runMethod"
"gui"
"runnableObject"
"ModelSimSimulator"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"1"
]
)
"TaskSetting"
(SettingsMap
settingsMap [
"exepath"
"%task_ModelSimPath"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

101
Prefs/hds_user-linux/v2018.1/tasks/precision_synthesis.tsk Normal file
View File

@@ -0,0 +1,101 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "Precision Synthesis"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_precision.bmp"
hasBitmap 1
tooltip "Runs Precision data preparation and invokes tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"flowSettingsDlg"
"$HDS_HOME/resources/tcl/plugins/dialogs/PrecisionSynthesisCombinedDlg.tbc"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
subTasks [
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Precision Synthesis Prepare Data"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_precision.bmp"
hasBitmap 1
tooltip "Does data preparation for Precision Synthesis"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"1"
"runnableObject"
"PrecisionSynthesisDataPrep"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
)
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Precision Synthesis Invoke"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_precision.bmp"
hasBitmap 1
tooltip "Invokes the Precision Synthesis tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"PrecisionSynthesisInvoke"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)
]
)

57
Prefs/hds_user-linux/v2018.1/tasks/precision_synthesis_flow.tsk Normal file
View File

@@ -0,0 +1,57 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "Precision Synthesis Flow"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_precision.bmp"
hasBitmap 1
tooltip "Generate and runs the entire Precision Synthesis flow"
taskSettings [
]
PreferedTasks [
(preferedMap
preferedEnum 1
)
(preferedMap
preferedEnum 3
preferedSetting "Precision"
)
]
onShortcutBar 1
onPulldownMenu 1
onToolbar 1
enabled 1
hierDepth 1
subTasks [
(HDSTaskRef
TaskName "Generate"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:Generate"
)
(HDSTaskRef
TaskName "Precision Synthesis"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:Precision Synthesis"
)
]
)

39
Prefs/hds_user-linux/v2018.1/tasks/quartus_place_and_route.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Quartus Place and Route"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_altera_quartus.bmp"
hasBitmap 1
tooltip "Invokes the Quartus II Place and Route tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"1"
"runnableObject"
"QISPARInvoke"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

39
Prefs/hds_user-linux/v2018.1/tasks/quartus_prime_import.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Quartus Prime Import"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_altera_quartus_prime.bmp"
hasBitmap 1
tooltip "Import IP variations from Quartus Prime"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
"\"%(p)\" %(library)"
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"QuartusPrimeImport"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

39
Prefs/hds_user-linux/v2018.1/tasks/quartus_programmer.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Quartus Programmer"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_quartus_programmer.bmp"
hasBitmap 1
tooltip "Invokes the Quartus II Programmer tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"1"
"runnableObject"
"QISPGMInvoke"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

94
Prefs/hds_user-linux/v2018.1/tasks/quartus_synthesis.tsk Normal file
View File

@@ -0,0 +1,94 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "Quartus Synthesis"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_quartus_synthesis.bmp"
hasBitmap 1
tooltip "Runs Quartus Synthesis data preparation and invokes tool"
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
subTasks [
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Quartus Synthesis Prepare Data"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_quartus_synthesis.bmp"
hasBitmap 1
tooltip "Does data preparation for Quartus Synthesis"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"1"
"runnableObject"
"QISDataPrep"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
)
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Quartus Synthesis Invoke"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_quartus_synthesis.bmp"
hasBitmap 1
tooltip "Invokes the Quartus Synthesis tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"QISInvoke"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)
]
)

50
Prefs/hds_user-linux/v2018.1/tasks/quartus_synthesis_flow.tsk Normal file
View File

@@ -0,0 +1,50 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "Quartus Synthesis Flow"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_quartus_synthesis.bmp"
hasBitmap 1
tooltip "Generate and runs the entire Quartus QIS Synthesis flow"
taskSettings [
]
PreferedTasks [
]
onShortcutBar 1
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
subTasks [
(HDSTaskRef
TaskName "Generate"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:Generate"
)
(HDSTaskRef
TaskName "Quartus Synthesis"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:Quartus Synthesis"
)
]
)

39
Prefs/hds_user-linux/v2018.1/tasks/quartus_synthesis_invoke.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Quartus Synthesis Invoke"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_quartus_synthesis.bmp"
hasBitmap 1
tooltip "Invokes the Quartus Synthesis tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"QISInvoke"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

39
Prefs/hds_user-linux/v2018.1/tasks/quartus_synthesis_prepare_data.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Quartus Synthesis Prepare Data"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_quartus_synthesis.bmp"
hasBitmap 1
tooltip "Does data preparation for Quartus Synthesis"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"1"
"runnableObject"
"QISDataPrep"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
)

45
Prefs/hds_user-linux/v2018.1/tasks/register_assistant.tsk Normal file
View File

@@ -0,0 +1,45 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Register Assistant"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_registerassistant.bmp"
hasBitmap 1
tooltip "Invokes Register Assistant"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"1"
"customPrompt"
""
"initialDir"
""
"noNeedForThroughDesignRoot"
"1"
"noNeedForUseViewSpecificSettings"
"1"
"noSettingsDlg"
"1"
"promptForRunSettings"
"0"
"runnableObject"
"RegisterAssistantInvoke"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 1
enabled 1
hierDepth 3
)

78
Prefs/hds_user-linux/v2018.1/tasks/svassistant_flow.tsk Normal file
View File

@@ -0,0 +1,78 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "SVAssistant Flow"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_svassistant.bmp"
hasBitmap 1
tooltip "Invokes SVAssistant Flow"
taskSettings [
]
PreferedTasks [
]
onShortcutBar 1
onPulldownMenu 1
onToolbar 1
enabled 1
hierDepth 1
subTasks [
(HDSTaskRef
TaskName "Generate"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:Generate"
)
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "SVAssistant"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_svassistant.bmp"
hasBitmap 1
tooltip "Invokes SVAssistant"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"1"
"customPrompt"
""
"initialDir"
""
"noNeedForThroughDesignRoot"
"1"
"noNeedForUseViewSpecificSettings"
"1"
"noSettingsDlg"
"1"
"promptForRunSettings"
"0"
"runnableObject"
"SvAssistantInvoke"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)
]
)

39
Prefs/hds_user-linux/v2018.1/tasks/xilinx_core_generator.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Xilinx CORE Generator"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_xilinxcoregen.bmp"
hasBitmap 1
tooltip "Creates Xilinx ISE CORE Generator components"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"XilinxCoregen"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

39
Prefs/hds_user-linux/v2018.1/tasks/xilinx_fpga_configuration_impact.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Xilinx FPGA Configuration (iMPACT)"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_impact.bmp"
hasBitmap 1
tooltip "Invokes the Xilinx ISE FPGA Configuration Tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"1"
"runnableObject"
"ImpactInvoke"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

39
Prefs/hds_user-linux/v2018.1/tasks/xilinx_import.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Xilinx Import"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_xilinx_import.bmp"
hasBitmap 1
tooltip "Import Existing Xilinx ISE Project into HDS"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"1"
"runnableObject"
"XilinxImport"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

39
Prefs/hds_user-linux/v2018.1/tasks/xilinx_place_and_route.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Xilinx Place and Route"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_xilinx_projnav.bmp"
hasBitmap 1
tooltip "Invokes the Xilinx ISE Place and Route tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"1"
"runnableObject"
"ISEPARInvoke"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

39
Prefs/hds_user-linux/v2018.1/tasks/xilinx_platform_studio.tsk Normal file
View File

@@ -0,0 +1,39 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Xilinx Platform Studio"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_xilinxplatstudio.bmp"
hasBitmap 1
tooltip "Invokes and imports files from Xilinx Platform Studio"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"XilinxPlatStudio"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

94
Prefs/hds_user-linux/v2018.1/tasks/xilinx_synthesis_tool.tsk Normal file
View File

@@ -0,0 +1,94 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "Xilinx Synthesis Tool"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_xilinx_synthesis.bmp"
hasBitmap 1
tooltip "Runs Xilinx ISE Synthesis Tool data preparation and invokes tool"
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
subTasks [
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "XST Prepare Data"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_xilinx_synthesis.bmp"
hasBitmap 1
tooltip "Does data preparation for Xilinx ISE Synthesis Tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"1"
"runnableObject"
"XSTDataPrep"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
)
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "XST Invoke"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_xilinx_synthesis.bmp"
hasBitmap 1
tooltip "Invokes Xilinx ISE Synthesis Tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runnableObject"
"XSTInvoke"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)
]
)

50
Prefs/hds_user-linux/v2018.1/tasks/xilinx_synthesis_tool_flow.tsk Normal file
View File

@@ -0,0 +1,50 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "Xilinx Synthesis Tool Flow"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_xilinx_synthesis.bmp"
hasBitmap 1
tooltip "Generate and runs the entire Xilinx Synthesis Tool flow"
taskSettings [
]
PreferedTasks [
]
onShortcutBar 1
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
subTasks [
(HDSTaskRef
TaskName "Generate"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:Generate"
)
(HDSTaskRef
TaskName "Xilinx Synthesis Tool"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:Xilinx Synthesis Tool"
)
]
)

72
Prefs/hds_user-linux/v2018.1/tasks/xilinx_vivado_flow.tsk Normal file
View File

@@ -0,0 +1,72 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "Xilinx Vivado Flow"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_xilinx_vivado.bmp"
hasBitmap 1
tooltip "Generate and runs Xilinx Vivado wizard"
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
subTasks [
(HDSTaskRef
TaskName "Generate"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:Generate"
)
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Xilinx Vivado"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_xilinx_vivado.bmp"
hasBitmap 1
tooltip "HDS integration with Xilinx Vivado"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"1"
"runnableObject"
"XilinxVivado"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"1"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
)
]
)

20
Prefs/hds_user-linux/v2018.1/templates/registered_views/Vunit_VHDL.psl Normal file
View File

@@ -0,0 +1,20 @@
FILE_NAMING_RULE: %(entity_name)_%(arch_name).psl
DESCRIPTION_START
This is the default template used for the creation of PSL Vunit (VHDL) files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- PSL Vunit(VHDL Syntax)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
vunit %(view) (%(unit))
{
default clock IS ClockName;
}

20
Prefs/hds_user-linux/v2018.1/templates/registered_views/Vunit_Verilog.psl Normal file
View File

@@ -0,0 +1,20 @@
FILE_NAMING_RULE: %(unit).psl
DESCRIPTION_START
This is the default template used for the creation of PSL Vunit (Verilog) files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
//
// PSL Vunit(Verilog Syntax)
//
// Created:
// by - %(user).%(group) (%(host))
// at - %(time) %(date)
//
// using Mentor Graphics HDL Designer(TM) %(version)
//
vunit %(view) (%(unit))
{
default clock = ClockName;
}

13
Prefs/hds_user-linux/v2018.1/templates/registered_views/c_file.c Normal file
View File

@@ -0,0 +1,13 @@
FILE_NAMING_RULE: c_file.c
DESCRIPTION_START
This is the default template used for the creation of C files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
/*
* Created:
* by - %(user).%(group) (%(host))
* at - %(time) %(date)
*
* using Mentor Graphics HDL Designer(TM) %(version)
*/

12
Prefs/hds_user-linux/v2018.1/templates/registered_views/class.cpp Normal file
View File

@@ -0,0 +1,12 @@
FILE_NAMING_RULE: afile.cpp
DESCRIPTION_START
This is the default template used for the creation of C++ files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
//
// Created:
// by - %(user).%(group) (%(host))
// at - %(time) %(date)
//
// using Mentor Graphics HDL Designer(TM) %(version)
//

18
Prefs/hds_user-linux/v2018.1/templates/verilog_Class/class.svh Normal file
View File

@@ -0,0 +1,18 @@
FILE_NAMING_RULE: %(class_name).svh
DESCRIPTION_START
This is the default template used for the creation of Class files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
//
// Verilog class %(library).%(unit)
//
// Created:
// by - %(user).%(group) (%(host))
// at - %(time) %(date)
//
// using Mentor Graphics HDL Designer(TM) %(version)
//
%(classBody)
// ### Please start your Verilog code here ###
endclass

18
Prefs/hds_user-linux/v2018.1/templates/verilog_Interface/interface.sv Normal file
View File

@@ -0,0 +1,18 @@
FILE_NAMING_RULE: %(interface_name).sv
DESCRIPTION_START
This is the default template used for the creation of Interface files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
//
// Verilog interface %(library).%(unit)
//
// Created:
// by - %(user).%(group) (%(host))
// at - %(time) %(date)
//
// using Mentor Graphics HDL Designer(TM) %(version)
//
%(interfaceBody)
// ### Please start your Verilog code here ###
endinterface

18
Prefs/hds_user-linux/v2018.1/templates/verilog_Package/package.sv Normal file
View File

@@ -0,0 +1,18 @@
FILE_NAMING_RULE: %(package_name).sv
DESCRIPTION_START
This is the default template used for the creation of Package files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
//
// Verilog package %(library).%(unit)
//
// Created:
// by - %(user).%(group) (%(host))
// at - %(time) %(date)
//
// using Mentor Graphics HDL Designer(TM) %(version)
//
%(packageBody)
// ### Please start your Verilog code here ###
endpackage

18
Prefs/hds_user-linux/v2018.1/templates/verilog_Program/program.sv Normal file
View File

@@ -0,0 +1,18 @@
FILE_NAMING_RULE: %(program_name).sv
DESCRIPTION_START
This is the default template used for the creation of program files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
//
// Verilog program %(library).%(unit)
//
// Created:
// by - %(user).%(group) (%(host))
// at - %(time) %(date)
//
// using Mentor Graphics HDL Designer(TM) %(version)
//
%(programBody)
// ### Please start your Verilog code here ###
endprogram

14
Prefs/hds_user-linux/v2018.1/templates/verilog_include/verilog_include.v Normal file
View File

@@ -0,0 +1,14 @@
FILE_NAMING_RULE: include_filename.v
DESCRIPTION_START
This is the default template used for the creation of Verilog Include files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
//
// Include file %(library)
//
// Created:
// by - %(user).%(group) (%(host))
// at - %(time) %(date)
//
// using Mentor Graphics HDL Designer(TM) %(version)
//

18
Prefs/hds_user-linux/v2018.1/templates/verilog_module/module.v Normal file
View File

@@ -0,0 +1,18 @@
FILE_NAMING_RULE: %(module_name).v
DESCRIPTION_START
This is the default template used for the creation of Verilog Module files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
//
// Verilog Module %(library).%(unit)
//
// Created:
// by - %(user).%(group) (%(host))
// at - %(time) %(date)
//
// using Mentor Graphics HDL Designer(TM) %(version)
//
%(moduleBody)
// ### Please start your Verilog code here ###
endmodule

15
Prefs/hds_user-linux/v2018.1/templates/vhdl_architecture/architecture.vhd Normal file
View File

@@ -0,0 +1,15 @@
FILE_NAMING_RULE: %(entity_name)_%(arch_name).vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Architecture files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Architecture %(library).%(unit).%(view)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
%(architecture)

17
Prefs/hds_user-linux/v2018.1/templates/vhdl_combined/combined.vhd Normal file
View File

@@ -0,0 +1,17 @@
FILE_NAMING_RULE: %(entity_name)_%(arch_name).vhd
DESCRIPTION_START
This is the default template used for the creation of combined VHDL Architecture and Entity files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Architecture %(library).%(unit).%(view)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
%(entity)
--
%(architecture)

19
Prefs/hds_user-linux/v2018.1/templates/vhdl_configuration/configuration.vhd Normal file
View File

@@ -0,0 +1,19 @@
FILE_NAMING_RULE: %(entity_name)_%(arch_name)_config.vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Configuration files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Configuration %(library).%(unit).%(view)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
CONFIGURATION %(entity_name)_config OF %(entity_name) IS
FOR %(arch_name)
END FOR;
END %(entity_name)_config;

15
Prefs/hds_user-linux/v2018.1/templates/vhdl_entity/entity.vhd Normal file
View File

@@ -0,0 +1,15 @@
FILE_NAMING_RULE: %(entity_name)_entity.vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Entity files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Entity %(library).%(unit).%(view)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
%(entity)

16
Prefs/hds_user-linux/v2018.1/templates/vhdl_package_body/package_body.vhd Normal file
View File

@@ -0,0 +1,16 @@
FILE_NAMING_RULE: %(entity_name)_pkg_body.vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Package Body files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Package Body %(library).%(unit)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
PACKAGE BODY %(entity_name) IS
END %(entity_name);

18
Prefs/hds_user-linux/v2018.1/templates/vhdl_package_header/package_header.vhd Normal file
View File

@@ -0,0 +1,18 @@
FILE_NAMING_RULE: %(entity_name)_pkg.vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Package Header files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Package Header %(library).%(unit)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
PACKAGE %(entity_name) IS
END %(entity_name);