2147 lines
72 KiB
C
2147 lines
72 KiB
C
/**
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******************************************************************************
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* @file stm32f7xx_hal_dma2d.c
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* @author MCD Application Team
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* @brief DMA2D HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the DMA2D peripheral:
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* + Initialization and de-initialization functions
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* + IO operation functions
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* + Peripheral Control functions
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* + Peripheral State and Errors functions
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@verbatim
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==============================================================================
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##### How to use this driver #####
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==============================================================================
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[..]
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(#) Program the required configuration through the following parameters:
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the transfer mode, the output color mode and the output offset using
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HAL_DMA2D_Init() function.
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(#) Program the required configuration through the following parameters:
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the input color mode, the input color, the input alpha value, the alpha mode,
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the red/blue swap mode, the inverted alpha mode and the input offset using
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HAL_DMA2D_ConfigLayer() function for foreground or/and background layer.
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*** Polling mode IO operation ***
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=================================
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[..]
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(#) Configure pdata parameter (explained hereafter), destination and data length
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and enable the transfer using HAL_DMA2D_Start().
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(#) Wait for end of transfer using HAL_DMA2D_PollForTransfer(), at this stage
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user can specify the value of timeout according to his end application.
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*** Interrupt mode IO operation ***
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===================================
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[..]
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(#) Configure pdata parameter, destination and data length and enable
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the transfer using HAL_DMA2D_Start_IT().
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(#) Use HAL_DMA2D_IRQHandler() called under DMA2D_IRQHandler() interrupt subroutine.
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(#) At the end of data transfer HAL_DMA2D_IRQHandler() function is executed and user can
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add his own function by customization of function pointer XferCpltCallback (member
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of DMA2D handle structure).
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(#) In case of error, the HAL_DMA2D_IRQHandler() function calls the callback
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XferErrorCallback.
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-@- In Register-to-Memory transfer mode, pdata parameter is the register
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color, in Memory-to-memory or Memory-to-Memory with pixel format
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conversion pdata is the source address.
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-@- Configure the foreground source address, the background source address,
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the destination and data length then Enable the transfer using
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HAL_DMA2D_BlendingStart() in polling mode and HAL_DMA2D_BlendingStart_IT()
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in interrupt mode.
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-@- HAL_DMA2D_BlendingStart() and HAL_DMA2D_BlendingStart_IT() functions
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are used if the memory to memory with blending transfer mode is selected.
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(#) Optionally, configure and enable the CLUT using HAL_DMA2D_CLUTLoad() in polling
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mode or HAL_DMA2D_CLUTLoad_IT() in interrupt mode.
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(#) Optionally, configure the line watermark in using the API HAL_DMA2D_ProgramLineEvent().
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(#) Optionally, configure the dead time value in the AHB clock cycle inserted between two
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consecutive accesses on the AHB master port in using the API HAL_DMA2D_ConfigDeadTime()
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and enable/disable the functionality with the APIs HAL_DMA2D_EnableDeadTime() or
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HAL_DMA2D_DisableDeadTime().
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(#) The transfer can be suspended, resumed and aborted using the following
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functions: HAL_DMA2D_Suspend(), HAL_DMA2D_Resume(), HAL_DMA2D_Abort().
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(#) The CLUT loading can be suspended, resumed and aborted using the following
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functions: HAL_DMA2D_CLUTLoading_Suspend(), HAL_DMA2D_CLUTLoading_Resume(),
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HAL_DMA2D_CLUTLoading_Abort().
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(#) To control the DMA2D state, use the following function: HAL_DMA2D_GetState().
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(#) To read the DMA2D error code, use the following function: HAL_DMA2D_GetError().
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*** DMA2D HAL driver macros list ***
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=============================================
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[..]
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Below the list of most used macros in DMA2D HAL driver :
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(+) __HAL_DMA2D_ENABLE: Enable the DMA2D peripheral.
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(+) __HAL_DMA2D_GET_FLAG: Get the DMA2D pending flags.
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(+) __HAL_DMA2D_CLEAR_FLAG: Clear the DMA2D pending flags.
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(+) __HAL_DMA2D_ENABLE_IT: Enable the specified DMA2D interrupts.
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(+) __HAL_DMA2D_DISABLE_IT: Disable the specified DMA2D interrupts.
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(+) __HAL_DMA2D_GET_IT_SOURCE: Check whether the specified DMA2D interrupt is enabled or not.
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*** Callback registration ***
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===================================
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[..]
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(#) The compilation define USE_HAL_DMA2D_REGISTER_CALLBACKS when set to 1
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allows the user to configure dynamically the driver callbacks.
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Use function @ref HAL_DMA2D_RegisterCallback() to register a user callback.
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(#) Function @ref HAL_DMA2D_RegisterCallback() allows to register following callbacks:
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(+) XferCpltCallback : callback for transfer complete.
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(+) XferErrorCallback : callback for transfer error.
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(+) LineEventCallback : callback for line event.
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(+) CLUTLoadingCpltCallback : callback for CLUT loading completion.
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(+) MspInitCallback : DMA2D MspInit.
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(+) MspDeInitCallback : DMA2D MspDeInit.
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This function takes as parameters the HAL peripheral handle, the Callback ID
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and a pointer to the user callback function.
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(#) Use function @ref HAL_DMA2D_UnRegisterCallback() to reset a callback to the default
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weak (surcharged) function.
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@ref HAL_DMA2D_UnRegisterCallback() takes as parameters the HAL peripheral handle,
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and the Callback ID.
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This function allows to reset following callbacks:
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(+) XferCpltCallback : callback for transfer complete.
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(+) XferErrorCallback : callback for transfer error.
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(+) LineEventCallback : callback for line event.
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(+) CLUTLoadingCpltCallback : callback for CLUT loading completion.
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(+) MspInitCallback : DMA2D MspInit.
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(+) MspDeInitCallback : DMA2D MspDeInit.
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(#) By default, after the @ref HAL_DMA2D_Init and if the state is HAL_DMA2D_STATE_RESET
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all callbacks are reset to the corresponding legacy weak (surcharged) functions:
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examples @ref HAL_DMA2D_LineEventCallback(), @ref HAL_DMA2D_CLUTLoadingCpltCallback()
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Exception done for MspInit and MspDeInit callbacks that are respectively
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reset to the legacy weak (surcharged) functions in the @ref HAL_DMA2D_Init
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and @ref HAL_DMA2D_DeInit only when these callbacks are null (not registered beforehand)
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If not, MspInit or MspDeInit are not null, the @ref HAL_DMA2D_Init and @ref HAL_DMA2D_DeInit
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keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
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Exception as well for Transfer Completion and Transfer Error callbacks that are not defined
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as weak (surcharged) functions. They must be defined by the user to be resorted to.
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Callbacks can be registered/unregistered in READY state only.
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Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
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in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
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during the Init/DeInit.
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In that case first register the MspInit/MspDeInit user callbacks
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using @ref HAL_DMA2D_RegisterCallback before calling @ref HAL_DMA2D_DeInit
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or @ref HAL_DMA2D_Init function.
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When The compilation define USE_HAL_DMA2D_REGISTER_CALLBACKS is set to 0 or
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not defined, the callback registering feature is not available
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and weak (surcharged) callbacks are used.
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[..]
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(@) You can refer to the DMA2D HAL driver header file for more useful macros
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@endverbatim
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f7xx_hal.h"
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#ifdef HAL_DMA2D_MODULE_ENABLED
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#if defined (DMA2D)
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/** @addtogroup STM32F7xx_HAL_Driver
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* @{
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*/
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/** @defgroup DMA2D DMA2D
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* @brief DMA2D HAL module driver
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* @{
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/** @defgroup DMA2D_Private_Constants DMA2D Private Constants
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* @{
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*/
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/** @defgroup DMA2D_TimeOut DMA2D Time Out
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* @{
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*/
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#define DMA2D_TIMEOUT_ABORT (1000U) /*!< 1s */
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#define DMA2D_TIMEOUT_SUSPEND (1000U) /*!< 1s */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/** @addtogroup DMA2D_Private_Functions DMA2D Private Functions
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* @{
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*/
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static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width,
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uint32_t Height);
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/**
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* @}
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*/
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/* Private functions ---------------------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup DMA2D_Exported_Functions DMA2D Exported Functions
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* @{
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*/
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/** @defgroup DMA2D_Exported_Functions_Group1 Initialization and de-initialization functions
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* @brief Initialization and Configuration functions
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*
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@verbatim
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===============================================================================
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##### Initialization and Configuration functions #####
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===============================================================================
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[..] This section provides functions allowing to:
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(+) Initialize and configure the DMA2D
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(+) De-initialize the DMA2D
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@endverbatim
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* @{
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*/
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/**
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* @brief Initialize the DMA2D according to the specified
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* parameters in the DMA2D_InitTypeDef and create the associated handle.
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* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
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* the configuration information for the DMA2D.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
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{
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/* Check the DMA2D peripheral state */
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if (hdma2d == NULL)
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{
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return HAL_ERROR;
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}
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/* Check the parameters */
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assert_param(IS_DMA2D_ALL_INSTANCE(hdma2d->Instance));
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assert_param(IS_DMA2D_MODE(hdma2d->Init.Mode));
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assert_param(IS_DMA2D_CMODE(hdma2d->Init.ColorMode));
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assert_param(IS_DMA2D_OFFSET(hdma2d->Init.OutputOffset));
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#if defined (DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
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assert_param(IS_DMA2D_ALPHA_INVERTED(hdma2d->Init.AlphaInverted));
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assert_param(IS_DMA2D_RB_SWAP(hdma2d->Init.RedBlueSwap));
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#endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
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#if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
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if (hdma2d->State == HAL_DMA2D_STATE_RESET)
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{
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/* Reset Callback pointers in HAL_DMA2D_STATE_RESET only */
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hdma2d->LineEventCallback = HAL_DMA2D_LineEventCallback;
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hdma2d->CLUTLoadingCpltCallback = HAL_DMA2D_CLUTLoadingCpltCallback;
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if (hdma2d->MspInitCallback == NULL)
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{
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hdma2d->MspInitCallback = HAL_DMA2D_MspInit;
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}
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/* Init the low level hardware */
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hdma2d->MspInitCallback(hdma2d);
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}
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#else
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if (hdma2d->State == HAL_DMA2D_STATE_RESET)
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{
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/* Allocate lock resource and initialize it */
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hdma2d->Lock = HAL_UNLOCKED;
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/* Init the low level hardware */
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HAL_DMA2D_MspInit(hdma2d);
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}
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#endif /* (USE_HAL_DMA2D_REGISTER_CALLBACKS) */
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/* Change DMA2D peripheral state */
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hdma2d->State = HAL_DMA2D_STATE_BUSY;
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/* DMA2D CR register configuration -------------------------------------------*/
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MODIFY_REG(hdma2d->Instance->CR, DMA2D_CR_MODE, hdma2d->Init.Mode);
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/* DMA2D OPFCCR register configuration ---------------------------------------*/
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MODIFY_REG(hdma2d->Instance->OPFCCR, DMA2D_OPFCCR_CM, hdma2d->Init.ColorMode);
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/* DMA2D OOR register configuration ------------------------------------------*/
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MODIFY_REG(hdma2d->Instance->OOR, DMA2D_OOR_LO, hdma2d->Init.OutputOffset);
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#if defined (DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
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/* DMA2D OPFCCR AI and RBS fields setting (Output Alpha Inversion)*/
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MODIFY_REG(hdma2d->Instance->OPFCCR, (DMA2D_OPFCCR_AI | DMA2D_OPFCCR_RBS),
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((hdma2d->Init.AlphaInverted << DMA2D_OPFCCR_AI_Pos) | \
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(hdma2d->Init.RedBlueSwap << DMA2D_OPFCCR_RBS_Pos)));
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#endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
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/* Update error code */
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hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
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/* Initialize the DMA2D state*/
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hdma2d->State = HAL_DMA2D_STATE_READY;
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return HAL_OK;
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}
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/**
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* @brief Deinitializes the DMA2D peripheral registers to their default reset
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* values.
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* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
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* the configuration information for the DMA2D.
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* @retval None
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*/
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HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
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{
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/* Check the DMA2D peripheral state */
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if (hdma2d == NULL)
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{
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return HAL_ERROR;
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}
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/* Before aborting any DMA2D transfer or CLUT loading, check
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first whether or not DMA2D clock is enabled */
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if (__HAL_RCC_DMA2D_IS_CLK_ENABLED())
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{
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/* Abort DMA2D transfer if any */
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if ((hdma2d->Instance->CR & DMA2D_CR_START) == DMA2D_CR_START)
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{
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if (HAL_DMA2D_Abort(hdma2d) != HAL_OK)
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{
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/* Issue when aborting DMA2D transfer */
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return HAL_ERROR;
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}
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}
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else
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{
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/* Abort background CLUT loading if any */
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if ((hdma2d->Instance->BGPFCCR & DMA2D_BGPFCCR_START) == DMA2D_BGPFCCR_START)
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{
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if (HAL_DMA2D_CLUTLoading_Abort(hdma2d, 0U) != HAL_OK)
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{
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/* Issue when aborting background CLUT loading */
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return HAL_ERROR;
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}
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}
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else
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{
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/* Abort foreground CLUT loading if any */
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if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START)
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{
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if (HAL_DMA2D_CLUTLoading_Abort(hdma2d, 1U) != HAL_OK)
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{
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/* Issue when aborting foreground CLUT loading */
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return HAL_ERROR;
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}
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}
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}
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}
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}
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/* Reset DMA2D control registers*/
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hdma2d->Instance->CR = 0U;
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hdma2d->Instance->IFCR = 0x3FU;
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hdma2d->Instance->FGOR = 0U;
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hdma2d->Instance->BGOR = 0U;
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hdma2d->Instance->FGPFCCR = 0U;
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hdma2d->Instance->BGPFCCR = 0U;
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hdma2d->Instance->OPFCCR = 0U;
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#if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
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if (hdma2d->MspDeInitCallback == NULL)
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{
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hdma2d->MspDeInitCallback = HAL_DMA2D_MspDeInit;
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}
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/* DeInit the low level hardware */
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hdma2d->MspDeInitCallback(hdma2d);
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#else
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/* Carry on with de-initialization of low level hardware */
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HAL_DMA2D_MspDeInit(hdma2d);
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#endif /* (USE_HAL_DMA2D_REGISTER_CALLBACKS) */
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/* Update error code */
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hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
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/* Initialize the DMA2D state*/
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hdma2d->State = HAL_DMA2D_STATE_RESET;
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/* Release Lock */
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__HAL_UNLOCK(hdma2d);
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return HAL_OK;
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}
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/**
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* @brief Initializes the DMA2D MSP.
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* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
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* the configuration information for the DMA2D.
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* @retval None
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*/
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__weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef *hdma2d)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hdma2d);
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/* NOTE : This function should not be modified; when the callback is needed,
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the HAL_DMA2D_MspInit can be implemented in the user file.
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*/
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}
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/**
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* @brief DeInitializes the DMA2D MSP.
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* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
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* the configuration information for the DMA2D.
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* @retval None
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*/
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__weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef *hdma2d)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hdma2d);
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/* NOTE : This function should not be modified; when the callback is needed,
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the HAL_DMA2D_MspDeInit can be implemented in the user file.
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*/
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}
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#if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
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/**
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* @brief Register a User DMA2D Callback
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* To be used instead of the weak (surcharged) predefined callback
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* @param hdma2d DMA2D handle
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* @param CallbackID ID of the callback to be registered
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* This parameter can be one of the following values:
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* @arg @ref HAL_DMA2D_TRANSFERCOMPLETE_CB_ID DMA2D transfer complete Callback ID
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* @arg @ref HAL_DMA2D_TRANSFERERROR_CB_ID DMA2D transfer error Callback ID
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* @arg @ref HAL_DMA2D_LINEEVENT_CB_ID DMA2D line event Callback ID
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* @arg @ref HAL_DMA2D_CLUTLOADINGCPLT_CB_ID DMA2D CLUT loading completion Callback ID
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* @arg @ref HAL_DMA2D_MSPINIT_CB_ID DMA2D MspInit callback ID
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* @arg @ref HAL_DMA2D_MSPDEINIT_CB_ID DMA2D MspDeInit callback ID
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* @param pCallback pointer to the Callback function
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* @note No weak predefined callbacks are defined for HAL_DMA2D_TRANSFERCOMPLETE_CB_ID or HAL_DMA2D_TRANSFERERROR_CB_ID
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* @retval status
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*/
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HAL_StatusTypeDef HAL_DMA2D_RegisterCallback(DMA2D_HandleTypeDef *hdma2d, HAL_DMA2D_CallbackIDTypeDef CallbackID,
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pDMA2D_CallbackTypeDef pCallback)
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{
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HAL_StatusTypeDef status = HAL_OK;
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if (pCallback == NULL)
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{
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/* Update the error code */
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hdma2d->ErrorCode |= HAL_DMA2D_ERROR_INVALID_CALLBACK;
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return HAL_ERROR;
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}
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/* Process locked */
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__HAL_LOCK(hdma2d);
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if (HAL_DMA2D_STATE_READY == hdma2d->State)
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{
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switch (CallbackID)
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|
{
|
|
case HAL_DMA2D_TRANSFERCOMPLETE_CB_ID :
|
|
hdma2d->XferCpltCallback = pCallback;
|
|
break;
|
|
|
|
case HAL_DMA2D_TRANSFERERROR_CB_ID :
|
|
hdma2d->XferErrorCallback = pCallback;
|
|
break;
|
|
|
|
case HAL_DMA2D_LINEEVENT_CB_ID :
|
|
hdma2d->LineEventCallback = pCallback;
|
|
break;
|
|
|
|
case HAL_DMA2D_CLUTLOADINGCPLT_CB_ID :
|
|
hdma2d->CLUTLoadingCpltCallback = pCallback;
|
|
break;
|
|
|
|
case HAL_DMA2D_MSPINIT_CB_ID :
|
|
hdma2d->MspInitCallback = pCallback;
|
|
break;
|
|
|
|
case HAL_DMA2D_MSPDEINIT_CB_ID :
|
|
hdma2d->MspDeInitCallback = pCallback;
|
|
break;
|
|
|
|
default :
|
|
/* Update the error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_INVALID_CALLBACK;
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
break;
|
|
}
|
|
}
|
|
else if (HAL_DMA2D_STATE_RESET == hdma2d->State)
|
|
{
|
|
switch (CallbackID)
|
|
{
|
|
case HAL_DMA2D_MSPINIT_CB_ID :
|
|
hdma2d->MspInitCallback = pCallback;
|
|
break;
|
|
|
|
case HAL_DMA2D_MSPDEINIT_CB_ID :
|
|
hdma2d->MspDeInitCallback = pCallback;
|
|
break;
|
|
|
|
default :
|
|
/* Update the error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_INVALID_CALLBACK;
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Update the error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_INVALID_CALLBACK;
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
}
|
|
|
|
/* Release Lock */
|
|
__HAL_UNLOCK(hdma2d);
|
|
return status;
|
|
}
|
|
|
|
/**
|
|
* @brief Unregister a DMA2D Callback
|
|
* DMA2D Callback is redirected to the weak (surcharged) predefined callback
|
|
* @param hdma2d DMA2D handle
|
|
* @param CallbackID ID of the callback to be unregistered
|
|
* This parameter can be one of the following values:
|
|
* @arg @ref HAL_DMA2D_TRANSFERCOMPLETE_CB_ID DMA2D transfer complete Callback ID
|
|
* @arg @ref HAL_DMA2D_TRANSFERERROR_CB_ID DMA2D transfer error Callback ID
|
|
* @arg @ref HAL_DMA2D_LINEEVENT_CB_ID DMA2D line event Callback ID
|
|
* @arg @ref HAL_DMA2D_CLUTLOADINGCPLT_CB_ID DMA2D CLUT loading completion Callback ID
|
|
* @arg @ref HAL_DMA2D_MSPINIT_CB_ID DMA2D MspInit callback ID
|
|
* @arg @ref HAL_DMA2D_MSPDEINIT_CB_ID DMA2D MspDeInit callback ID
|
|
* @note No weak predefined callbacks are defined for HAL_DMA2D_TRANSFERCOMPLETE_CB_ID or HAL_DMA2D_TRANSFERERROR_CB_ID
|
|
* @retval status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_UnRegisterCallback(DMA2D_HandleTypeDef *hdma2d, HAL_DMA2D_CallbackIDTypeDef CallbackID)
|
|
{
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
if (HAL_DMA2D_STATE_READY == hdma2d->State)
|
|
{
|
|
switch (CallbackID)
|
|
{
|
|
case HAL_DMA2D_TRANSFERCOMPLETE_CB_ID :
|
|
hdma2d->XferCpltCallback = NULL;
|
|
break;
|
|
|
|
case HAL_DMA2D_TRANSFERERROR_CB_ID :
|
|
hdma2d->XferErrorCallback = NULL;
|
|
break;
|
|
|
|
case HAL_DMA2D_LINEEVENT_CB_ID :
|
|
hdma2d->LineEventCallback = HAL_DMA2D_LineEventCallback;
|
|
break;
|
|
|
|
case HAL_DMA2D_CLUTLOADINGCPLT_CB_ID :
|
|
hdma2d->CLUTLoadingCpltCallback = HAL_DMA2D_CLUTLoadingCpltCallback;
|
|
break;
|
|
|
|
case HAL_DMA2D_MSPINIT_CB_ID :
|
|
hdma2d->MspInitCallback = HAL_DMA2D_MspInit; /* Legacy weak (surcharged) Msp Init */
|
|
break;
|
|
|
|
case HAL_DMA2D_MSPDEINIT_CB_ID :
|
|
hdma2d->MspDeInitCallback = HAL_DMA2D_MspDeInit; /* Legacy weak (surcharged) Msp DeInit */
|
|
break;
|
|
|
|
default :
|
|
/* Update the error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_INVALID_CALLBACK;
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
break;
|
|
}
|
|
}
|
|
else if (HAL_DMA2D_STATE_RESET == hdma2d->State)
|
|
{
|
|
switch (CallbackID)
|
|
{
|
|
case HAL_DMA2D_MSPINIT_CB_ID :
|
|
hdma2d->MspInitCallback = HAL_DMA2D_MspInit; /* Legacy weak (surcharged) Msp Init */
|
|
break;
|
|
|
|
case HAL_DMA2D_MSPDEINIT_CB_ID :
|
|
hdma2d->MspDeInitCallback = HAL_DMA2D_MspDeInit; /* Legacy weak (surcharged) Msp DeInit */
|
|
break;
|
|
|
|
default :
|
|
/* Update the error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_INVALID_CALLBACK;
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Update the error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_INVALID_CALLBACK;
|
|
/* update return status */
|
|
status = HAL_ERROR;
|
|
}
|
|
|
|
/* Release Lock */
|
|
__HAL_UNLOCK(hdma2d);
|
|
return status;
|
|
}
|
|
#endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
|
|
/** @defgroup DMA2D_Exported_Functions_Group2 IO operation functions
|
|
* @brief IO operation functions
|
|
*
|
|
@verbatim
|
|
===============================================================================
|
|
##### IO operation functions #####
|
|
===============================================================================
|
|
[..] This section provides functions allowing to:
|
|
(+) Configure the pdata, destination address and data size then
|
|
start the DMA2D transfer.
|
|
(+) Configure the source for foreground and background, destination address
|
|
and data size then start a MultiBuffer DMA2D transfer.
|
|
(+) Configure the pdata, destination address and data size then
|
|
start the DMA2D transfer with interrupt.
|
|
(+) Configure the source for foreground and background, destination address
|
|
and data size then start a MultiBuffer DMA2D transfer with interrupt.
|
|
(+) Abort DMA2D transfer.
|
|
(+) Suspend DMA2D transfer.
|
|
(+) Resume DMA2D transfer.
|
|
(+) Enable CLUT transfer.
|
|
(+) Configure CLUT loading then start transfer in polling mode.
|
|
(+) Configure CLUT loading then start transfer in interrupt mode.
|
|
(+) Abort DMA2D CLUT loading.
|
|
(+) Suspend DMA2D CLUT loading.
|
|
(+) Resume DMA2D CLUT loading.
|
|
(+) Poll for transfer complete.
|
|
(+) handle DMA2D interrupt request.
|
|
(+) Transfer watermark callback.
|
|
(+) CLUT Transfer Complete callback.
|
|
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Start the DMA2D Transfer.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param pdata Configure the source memory Buffer address if
|
|
* Memory-to-Memory or Memory-to-Memory with pixel format
|
|
* conversion mode is selected, or configure
|
|
* the color value if Register-to-Memory mode is selected.
|
|
* @param DstAddress The destination memory Buffer address.
|
|
* @param Width The width of data to be transferred from source
|
|
* to destination (expressed in number of pixels per line).
|
|
* @param Height The height of data to be transferred from source to destination (expressed in number of lines).
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width,
|
|
uint32_t Height)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LINE(Height));
|
|
assert_param(IS_DMA2D_PIXEL(Width));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Configure the source, destination address and the data size */
|
|
DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
|
|
|
|
/* Enable the Peripheral */
|
|
__HAL_DMA2D_ENABLE(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Start the DMA2D Transfer with interrupt enabled.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param pdata Configure the source memory Buffer address if
|
|
* the Memory-to-Memory or Memory-to-Memory with pixel format
|
|
* conversion mode is selected, or configure
|
|
* the color value if Register-to-Memory mode is selected.
|
|
* @param DstAddress The destination memory Buffer address.
|
|
* @param Width The width of data to be transferred from source
|
|
* to destination (expressed in number of pixels per line).
|
|
* @param Height The height of data to be transferred from source to destination (expressed in number of lines).
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width,
|
|
uint32_t Height)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LINE(Height));
|
|
assert_param(IS_DMA2D_PIXEL(Width));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Configure the source, destination address and the data size */
|
|
DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
|
|
|
|
/* Enable the transfer complete, transfer error and configuration error interrupts */
|
|
__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC | DMA2D_IT_TE | DMA2D_IT_CE);
|
|
|
|
/* Enable the Peripheral */
|
|
__HAL_DMA2D_ENABLE(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Start the multi-source DMA2D Transfer.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param SrcAddress1 The source memory Buffer address for the foreground layer.
|
|
* @param SrcAddress2 The source memory Buffer address for the background layer.
|
|
* @param DstAddress The destination memory Buffer address.
|
|
* @param Width The width of data to be transferred from source
|
|
* to destination (expressed in number of pixels per line).
|
|
* @param Height The height of data to be transferred from source to destination (expressed in number of lines).
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2,
|
|
uint32_t DstAddress, uint32_t Width, uint32_t Height)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LINE(Height));
|
|
assert_param(IS_DMA2D_PIXEL(Width));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Configure DMA2D Stream source2 address */
|
|
WRITE_REG(hdma2d->Instance->BGMAR, SrcAddress2);
|
|
|
|
/* Configure the source, destination address and the data size */
|
|
DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
|
|
|
|
/* Enable the Peripheral */
|
|
__HAL_DMA2D_ENABLE(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Start the multi-source DMA2D Transfer with interrupt enabled.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param SrcAddress1 The source memory Buffer address for the foreground layer.
|
|
* @param SrcAddress2 The source memory Buffer address for the background layer.
|
|
* @param DstAddress The destination memory Buffer address.
|
|
* @param Width The width of data to be transferred from source
|
|
* to destination (expressed in number of pixels per line).
|
|
* @param Height The height of data to be transferred from source to destination (expressed in number of lines).
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2,
|
|
uint32_t DstAddress, uint32_t Width, uint32_t Height)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LINE(Height));
|
|
assert_param(IS_DMA2D_PIXEL(Width));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Configure DMA2D Stream source2 address */
|
|
WRITE_REG(hdma2d->Instance->BGMAR, SrcAddress2);
|
|
|
|
/* Configure the source, destination address and the data size */
|
|
DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
|
|
|
|
/* Enable the transfer complete, transfer error and configuration error interrupts */
|
|
__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC | DMA2D_IT_TE | DMA2D_IT_CE);
|
|
|
|
/* Enable the Peripheral */
|
|
__HAL_DMA2D_ENABLE(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Abort the DMA2D Transfer.
|
|
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
uint32_t tickstart;
|
|
|
|
/* Abort the DMA2D transfer */
|
|
/* START bit is reset to make sure not to set it again, in the event the HW clears it
|
|
between the register read and the register write by the CPU (writing 0 has no
|
|
effect on START bitvalue) */
|
|
MODIFY_REG(hdma2d->Instance->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
/* Check if the DMA2D is effectively disabled */
|
|
while ((hdma2d->Instance->CR & DMA2D_CR_START) != 0U)
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > DMA2D_TIMEOUT_ABORT)
|
|
{
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
|
|
|
/* Change the DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_TIMEOUT;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
|
|
/* Disable the Transfer Complete, Transfer Error and Configuration Error interrupts */
|
|
__HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC | DMA2D_IT_TE | DMA2D_IT_CE);
|
|
|
|
/* Change the DMA2D state*/
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Suspend the DMA2D Transfer.
|
|
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
uint32_t tickstart;
|
|
|
|
/* Suspend the DMA2D transfer */
|
|
/* START bit is reset to make sure not to set it again, in the event the HW clears it
|
|
between the register read and the register write by the CPU (writing 0 has no
|
|
effect on START bitvalue). */
|
|
MODIFY_REG(hdma2d->Instance->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
/* Check if the DMA2D is effectively suspended */
|
|
while ((hdma2d->Instance->CR & (DMA2D_CR_SUSP | DMA2D_CR_START)) == DMA2D_CR_START)
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > DMA2D_TIMEOUT_SUSPEND)
|
|
{
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
|
|
|
/* Change the DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_TIMEOUT;
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
|
|
/* Check whether or not a transfer is actually suspended and change the DMA2D state accordingly */
|
|
if ((hdma2d->Instance->CR & DMA2D_CR_START) != 0U)
|
|
{
|
|
hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
|
|
}
|
|
else
|
|
{
|
|
/* Make sure SUSP bit is cleared since it is meaningless
|
|
when no transfer is on-going */
|
|
CLEAR_BIT(hdma2d->Instance->CR, DMA2D_CR_SUSP);
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Resume the DMA2D Transfer.
|
|
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
/* Check the SUSP and START bits */
|
|
if ((hdma2d->Instance->CR & (DMA2D_CR_SUSP | DMA2D_CR_START)) == (DMA2D_CR_SUSP | DMA2D_CR_START))
|
|
{
|
|
/* Ongoing transfer is suspended: change the DMA2D state before resuming */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
}
|
|
|
|
/* Resume the DMA2D transfer */
|
|
/* START bit is reset to make sure not to set it again, in the event the HW clears it
|
|
between the register read and the register write by the CPU (writing 0 has no
|
|
effect on START bitvalue). */
|
|
CLEAR_BIT(hdma2d->Instance->CR, (DMA2D_CR_SUSP | DMA2D_CR_START));
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Enable the DMA2D CLUT Transfer.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param LayerIdx DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LAYER(LayerIdx));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
if (LayerIdx == DMA2D_BACKGROUND_LAYER)
|
|
{
|
|
/* Enable the background CLUT loading */
|
|
SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);
|
|
}
|
|
else
|
|
{
|
|
/* Enable the foreground CLUT loading */
|
|
SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START);
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Start DMA2D CLUT Loading.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param CLUTCfg Pointer to a DMA2D_CLUTCfgTypeDef structure that contains
|
|
* the configuration information for the color look up table.
|
|
* @param LayerIdx DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg, uint32_t LayerIdx)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LAYER(LayerIdx));
|
|
assert_param(IS_DMA2D_CLUT_CM(CLUTCfg->CLUTColorMode));
|
|
assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg->Size));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Configure the CLUT of the background DMA2D layer */
|
|
if (LayerIdx == DMA2D_BACKGROUND_LAYER)
|
|
{
|
|
/* Write background CLUT memory address */
|
|
WRITE_REG(hdma2d->Instance->BGCMAR, (uint32_t)CLUTCfg->pCLUT);
|
|
|
|
/* Write background CLUT size and CLUT color mode */
|
|
MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),
|
|
((CLUTCfg->Size << DMA2D_BGPFCCR_CS_Pos) | (CLUTCfg->CLUTColorMode << DMA2D_BGPFCCR_CCM_Pos)));
|
|
|
|
/* Enable the CLUT loading for the background */
|
|
SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);
|
|
}
|
|
/* Configure the CLUT of the foreground DMA2D layer */
|
|
else
|
|
{
|
|
/* Write foreground CLUT memory address */
|
|
WRITE_REG(hdma2d->Instance->FGCMAR, (uint32_t)CLUTCfg->pCLUT);
|
|
|
|
/* Write foreground CLUT size and CLUT color mode */
|
|
MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM),
|
|
((CLUTCfg->Size << DMA2D_FGPFCCR_CS_Pos) | (CLUTCfg->CLUTColorMode << DMA2D_FGPFCCR_CCM_Pos)));
|
|
|
|
/* Enable the CLUT loading for the foreground */
|
|
SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START);
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Start DMA2D CLUT Loading with interrupt enabled.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param CLUTCfg Pointer to a DMA2D_CLUTCfgTypeDef structure that contains
|
|
* the configuration information for the color look up table.
|
|
* @param LayerIdx DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_CLUTStartLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef *CLUTCfg,
|
|
uint32_t LayerIdx)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LAYER(LayerIdx));
|
|
assert_param(IS_DMA2D_CLUT_CM(CLUTCfg->CLUTColorMode));
|
|
assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg->Size));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Configure the CLUT of the background DMA2D layer */
|
|
if (LayerIdx == DMA2D_BACKGROUND_LAYER)
|
|
{
|
|
/* Write background CLUT memory address */
|
|
WRITE_REG(hdma2d->Instance->BGCMAR, (uint32_t)CLUTCfg->pCLUT);
|
|
|
|
/* Write background CLUT size and CLUT color mode */
|
|
MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),
|
|
((CLUTCfg->Size << DMA2D_BGPFCCR_CS_Pos) | (CLUTCfg->CLUTColorMode << DMA2D_BGPFCCR_CCM_Pos)));
|
|
|
|
/* Enable the CLUT Transfer Complete, transfer Error, configuration Error and CLUT Access Error interrupts */
|
|
__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CTC | DMA2D_IT_TE | DMA2D_IT_CE | DMA2D_IT_CAE);
|
|
|
|
/* Enable the CLUT loading for the background */
|
|
SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);
|
|
}
|
|
/* Configure the CLUT of the foreground DMA2D layer */
|
|
else
|
|
{
|
|
/* Write foreground CLUT memory address */
|
|
WRITE_REG(hdma2d->Instance->FGCMAR, (uint32_t)CLUTCfg->pCLUT);
|
|
|
|
/* Write foreground CLUT size and CLUT color mode */
|
|
MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM),
|
|
((CLUTCfg->Size << DMA2D_FGPFCCR_CS_Pos) | (CLUTCfg->CLUTColorMode << DMA2D_FGPFCCR_CCM_Pos)));
|
|
|
|
/* Enable the CLUT Transfer Complete, transfer Error, configuration Error and CLUT Access Error interrupts */
|
|
__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CTC | DMA2D_IT_TE | DMA2D_IT_CE | DMA2D_IT_CAE);
|
|
|
|
/* Enable the CLUT loading for the foreground */
|
|
SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START);
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Start DMA2D CLUT Loading.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param CLUTCfg Pointer to a DMA2D_CLUTCfgTypeDef structure that contains
|
|
* the configuration information for the color look up table.
|
|
* @param LayerIdx DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)
|
|
* @note API obsolete and maintained for compatibility with legacy. User is
|
|
* invited to resort to HAL_DMA2D_CLUTStartLoad() instead to benefit from
|
|
* code compactness, code size and improved heap usage.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LAYER(LayerIdx));
|
|
assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
|
|
assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Configure the CLUT of the background DMA2D layer */
|
|
if (LayerIdx == DMA2D_BACKGROUND_LAYER)
|
|
{
|
|
/* Write background CLUT memory address */
|
|
WRITE_REG(hdma2d->Instance->BGCMAR, (uint32_t)CLUTCfg.pCLUT);
|
|
|
|
/* Write background CLUT size and CLUT color mode */
|
|
MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),
|
|
((CLUTCfg.Size << DMA2D_BGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_BGPFCCR_CCM_Pos)));
|
|
|
|
/* Enable the CLUT loading for the background */
|
|
SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);
|
|
}
|
|
/* Configure the CLUT of the foreground DMA2D layer */
|
|
else
|
|
{
|
|
/* Write foreground CLUT memory address */
|
|
WRITE_REG(hdma2d->Instance->FGCMAR, (uint32_t)CLUTCfg.pCLUT);
|
|
|
|
/* Write foreground CLUT size and CLUT color mode */
|
|
MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM),
|
|
((CLUTCfg.Size << DMA2D_FGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_FGPFCCR_CCM_Pos)));
|
|
|
|
/* Enable the CLUT loading for the foreground */
|
|
SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START);
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Start DMA2D CLUT Loading with interrupt enabled.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param CLUTCfg Pointer to a DMA2D_CLUTCfgTypeDef structure that contains
|
|
* the configuration information for the color look up table.
|
|
* @param LayerIdx DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)
|
|
* @note API obsolete and maintained for compatibility with legacy. User is
|
|
* invited to resort to HAL_DMA2D_CLUTStartLoad_IT() instead to benefit
|
|
* from code compactness, code size and improved heap usage.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LAYER(LayerIdx));
|
|
assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
|
|
assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Configure the CLUT of the background DMA2D layer */
|
|
if (LayerIdx == DMA2D_BACKGROUND_LAYER)
|
|
{
|
|
/* Write background CLUT memory address */
|
|
WRITE_REG(hdma2d->Instance->BGCMAR, (uint32_t)CLUTCfg.pCLUT);
|
|
|
|
/* Write background CLUT size and CLUT color mode */
|
|
MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),
|
|
((CLUTCfg.Size << DMA2D_BGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_BGPFCCR_CCM_Pos)));
|
|
|
|
/* Enable the CLUT Transfer Complete, transfer Error, configuration Error and CLUT Access Error interrupts */
|
|
__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CTC | DMA2D_IT_TE | DMA2D_IT_CE | DMA2D_IT_CAE);
|
|
|
|
/* Enable the CLUT loading for the background */
|
|
SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);
|
|
}
|
|
/* Configure the CLUT of the foreground DMA2D layer */
|
|
else
|
|
{
|
|
/* Write foreground CLUT memory address */
|
|
WRITE_REG(hdma2d->Instance->FGCMAR, (uint32_t)CLUTCfg.pCLUT);
|
|
|
|
/* Write foreground CLUT size and CLUT color mode */
|
|
MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM),
|
|
((CLUTCfg.Size << DMA2D_FGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_FGPFCCR_CCM_Pos)));
|
|
|
|
/* Enable the CLUT Transfer Complete, transfer Error, configuration Error and CLUT Access Error interrupts */
|
|
__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CTC | DMA2D_IT_TE | DMA2D_IT_CE | DMA2D_IT_CAE);
|
|
|
|
/* Enable the CLUT loading for the foreground */
|
|
SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START);
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Abort the DMA2D CLUT loading.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param LayerIdx DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Abort(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
|
|
{
|
|
uint32_t tickstart;
|
|
const __IO uint32_t *reg = &(hdma2d->Instance->BGPFCCR); /* by default, point at background register */
|
|
|
|
/* Abort the CLUT loading */
|
|
SET_BIT(hdma2d->Instance->CR, DMA2D_CR_ABORT);
|
|
|
|
/* If foreground CLUT loading is considered, update local variables */
|
|
if (LayerIdx == DMA2D_FOREGROUND_LAYER)
|
|
{
|
|
reg = &(hdma2d->Instance->FGPFCCR);
|
|
}
|
|
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
/* Check if the CLUT loading is aborted */
|
|
while ((*reg & DMA2D_BGPFCCR_START) != 0U)
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > DMA2D_TIMEOUT_ABORT)
|
|
{
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
|
|
|
/* Change the DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_TIMEOUT;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
|
|
/* Disable the CLUT Transfer Complete, Transfer Error, Configuration Error and CLUT Access Error interrupts */
|
|
__HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CTC | DMA2D_IT_TE | DMA2D_IT_CE | DMA2D_IT_CAE);
|
|
|
|
/* Change the DMA2D state*/
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Suspend the DMA2D CLUT loading.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param LayerIdx DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Suspend(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
|
|
{
|
|
uint32_t tickstart;
|
|
uint32_t loadsuspended;
|
|
const __IO uint32_t *reg = &(hdma2d->Instance->BGPFCCR); /* by default, point at background register */
|
|
|
|
/* Suspend the CLUT loading */
|
|
SET_BIT(hdma2d->Instance->CR, DMA2D_CR_SUSP);
|
|
|
|
/* If foreground CLUT loading is considered, update local variables */
|
|
if (LayerIdx == DMA2D_FOREGROUND_LAYER)
|
|
{
|
|
reg = &(hdma2d->Instance->FGPFCCR);
|
|
}
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
/* Check if the CLUT loading is suspended */
|
|
/* 1st condition: Suspend Check */
|
|
loadsuspended = ((hdma2d->Instance->CR & DMA2D_CR_SUSP) == DMA2D_CR_SUSP) ? 1UL : 0UL;
|
|
/* 2nd condition: Not Start Check */
|
|
loadsuspended |= ((*reg & DMA2D_BGPFCCR_START) != DMA2D_BGPFCCR_START) ? 1UL : 0UL;
|
|
while (loadsuspended == 0UL)
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > DMA2D_TIMEOUT_SUSPEND)
|
|
{
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
|
|
|
/* Change the DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_TIMEOUT;
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
/* 1st condition: Suspend Check */
|
|
loadsuspended = ((hdma2d->Instance->CR & DMA2D_CR_SUSP) == DMA2D_CR_SUSP) ? 1UL : 0UL;
|
|
/* 2nd condition: Not Start Check */
|
|
loadsuspended |= ((*reg & DMA2D_BGPFCCR_START) != DMA2D_BGPFCCR_START) ? 1UL : 0UL;
|
|
}
|
|
|
|
/* Check whether or not a transfer is actually suspended and change the DMA2D state accordingly */
|
|
if ((*reg & DMA2D_BGPFCCR_START) != 0U)
|
|
{
|
|
hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
|
|
}
|
|
else
|
|
{
|
|
/* Make sure SUSP bit is cleared since it is meaningless
|
|
when no transfer is on-going */
|
|
CLEAR_BIT(hdma2d->Instance->CR, DMA2D_CR_SUSP);
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Resume the DMA2D CLUT loading.
|
|
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param LayerIdx DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Resume(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
|
|
{
|
|
/* Check the SUSP and START bits for background or foreground CLUT loading */
|
|
if (LayerIdx == DMA2D_BACKGROUND_LAYER)
|
|
{
|
|
/* Background CLUT loading suspension check */
|
|
if ((hdma2d->Instance->CR & DMA2D_CR_SUSP) == DMA2D_CR_SUSP)
|
|
{
|
|
if ((hdma2d->Instance->BGPFCCR & DMA2D_BGPFCCR_START) == DMA2D_BGPFCCR_START)
|
|
{
|
|
/* Ongoing CLUT loading is suspended: change the DMA2D state before resuming */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Foreground CLUT loading suspension check */
|
|
if ((hdma2d->Instance->CR & DMA2D_CR_SUSP) == DMA2D_CR_SUSP)
|
|
{
|
|
if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START)
|
|
{
|
|
/* Ongoing CLUT loading is suspended: change the DMA2D state before resuming */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Resume the CLUT loading */
|
|
CLEAR_BIT(hdma2d->Instance->CR, DMA2D_CR_SUSP);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
|
|
/**
|
|
|
|
* @brief Polling for transfer complete or CLUT loading.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param Timeout Timeout duration
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
|
|
{
|
|
uint32_t tickstart;
|
|
uint32_t layer_start;
|
|
__IO uint32_t isrflags = 0x0U;
|
|
|
|
/* Polling for DMA2D transfer */
|
|
if ((hdma2d->Instance->CR & DMA2D_CR_START) != 0U)
|
|
{
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
while (__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == 0U)
|
|
{
|
|
isrflags = READ_REG(hdma2d->Instance->ISR);
|
|
if ((isrflags & (DMA2D_FLAG_CE | DMA2D_FLAG_TE)) != 0U)
|
|
{
|
|
if ((isrflags & DMA2D_FLAG_CE) != 0U)
|
|
{
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
|
|
}
|
|
if ((isrflags & DMA2D_FLAG_TE) != 0U)
|
|
{
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
|
|
}
|
|
/* Clear the transfer and configuration error flags */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE | DMA2D_FLAG_TE);
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_ERROR;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_ERROR;
|
|
}
|
|
/* Check for the Timeout */
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
{
|
|
if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
|
|
{
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
|
|
|
/* Change the DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_TIMEOUT;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/* Polling for CLUT loading (foreground or background) */
|
|
layer_start = hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START;
|
|
layer_start |= hdma2d->Instance->BGPFCCR & DMA2D_BGPFCCR_START;
|
|
if (layer_start != 0U)
|
|
{
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
while (__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == 0U)
|
|
{
|
|
isrflags = READ_REG(hdma2d->Instance->ISR);
|
|
if ((isrflags & (DMA2D_FLAG_CAE | DMA2D_FLAG_CE | DMA2D_FLAG_TE)) != 0U)
|
|
{
|
|
if ((isrflags & DMA2D_FLAG_CAE) != 0U)
|
|
{
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CAE;
|
|
}
|
|
if ((isrflags & DMA2D_FLAG_CE) != 0U)
|
|
{
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
|
|
}
|
|
if ((isrflags & DMA2D_FLAG_TE) != 0U)
|
|
{
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
|
|
}
|
|
/* Clear the CLUT Access Error, Configuration Error and Transfer Error flags */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE | DMA2D_FLAG_CE | DMA2D_FLAG_TE);
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_ERROR;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_ERROR;
|
|
}
|
|
/* Check for the Timeout */
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
{
|
|
if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
|
|
{
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
|
|
|
/* Change the DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_TIMEOUT;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Clear the transfer complete and CLUT loading flags */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC | DMA2D_FLAG_CTC);
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
/**
|
|
* @brief Handle DMA2D interrupt request.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @retval HAL status
|
|
*/
|
|
void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
uint32_t isrflags = READ_REG(hdma2d->Instance->ISR);
|
|
uint32_t crflags = READ_REG(hdma2d->Instance->CR);
|
|
|
|
/* Transfer Error Interrupt management ***************************************/
|
|
if ((isrflags & DMA2D_FLAG_TE) != 0U)
|
|
{
|
|
if ((crflags & DMA2D_IT_TE) != 0U)
|
|
{
|
|
/* Disable the transfer Error interrupt */
|
|
__HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
|
|
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
|
|
|
|
/* Clear the transfer error flag */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_ERROR;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
if (hdma2d->XferErrorCallback != NULL)
|
|
{
|
|
/* Transfer error Callback */
|
|
hdma2d->XferErrorCallback(hdma2d);
|
|
}
|
|
}
|
|
}
|
|
/* Configuration Error Interrupt management **********************************/
|
|
if ((isrflags & DMA2D_FLAG_CE) != 0U)
|
|
{
|
|
if ((crflags & DMA2D_IT_CE) != 0U)
|
|
{
|
|
/* Disable the Configuration Error interrupt */
|
|
__HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
|
|
|
|
/* Clear the Configuration error flag */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
|
|
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_ERROR;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
if (hdma2d->XferErrorCallback != NULL)
|
|
{
|
|
/* Transfer error Callback */
|
|
hdma2d->XferErrorCallback(hdma2d);
|
|
}
|
|
}
|
|
}
|
|
/* CLUT access Error Interrupt management ***********************************/
|
|
if ((isrflags & DMA2D_FLAG_CAE) != 0U)
|
|
{
|
|
if ((crflags & DMA2D_IT_CAE) != 0U)
|
|
{
|
|
/* Disable the CLUT access error interrupt */
|
|
__HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CAE);
|
|
|
|
/* Clear the CLUT access error flag */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
|
|
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CAE;
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_ERROR;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
if (hdma2d->XferErrorCallback != NULL)
|
|
{
|
|
/* Transfer error Callback */
|
|
hdma2d->XferErrorCallback(hdma2d);
|
|
}
|
|
}
|
|
}
|
|
/* Transfer watermark Interrupt management **********************************/
|
|
if ((isrflags & DMA2D_FLAG_TW) != 0U)
|
|
{
|
|
if ((crflags & DMA2D_IT_TW) != 0U)
|
|
{
|
|
/* Disable the transfer watermark interrupt */
|
|
__HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TW);
|
|
|
|
/* Clear the transfer watermark flag */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TW);
|
|
|
|
/* Transfer watermark Callback */
|
|
#if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
|
|
hdma2d->LineEventCallback(hdma2d);
|
|
#else
|
|
HAL_DMA2D_LineEventCallback(hdma2d);
|
|
#endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */
|
|
|
|
}
|
|
}
|
|
/* Transfer Complete Interrupt management ************************************/
|
|
if ((isrflags & DMA2D_FLAG_TC) != 0U)
|
|
{
|
|
if ((crflags & DMA2D_IT_TC) != 0U)
|
|
{
|
|
/* Disable the transfer complete interrupt */
|
|
__HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
|
|
|
|
/* Clear the transfer complete flag */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
|
|
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
if (hdma2d->XferCpltCallback != NULL)
|
|
{
|
|
/* Transfer complete Callback */
|
|
hdma2d->XferCpltCallback(hdma2d);
|
|
}
|
|
}
|
|
}
|
|
/* CLUT Transfer Complete Interrupt management ******************************/
|
|
if ((isrflags & DMA2D_FLAG_CTC) != 0U)
|
|
{
|
|
if ((crflags & DMA2D_IT_CTC) != 0U)
|
|
{
|
|
/* Disable the CLUT transfer complete interrupt */
|
|
__HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CTC);
|
|
|
|
/* Clear the CLUT transfer complete flag */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
|
|
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
/* CLUT Transfer complete Callback */
|
|
#if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
|
|
hdma2d->CLUTLoadingCpltCallback(hdma2d);
|
|
#else
|
|
HAL_DMA2D_CLUTLoadingCpltCallback(hdma2d);
|
|
#endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */
|
|
}
|
|
}
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief Transfer watermark callback.
|
|
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_DMA2D_LineEventCallback(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(hdma2d);
|
|
|
|
/* NOTE : This function should not be modified; when the callback is needed,
|
|
the HAL_DMA2D_LineEventCallback can be implemented in the user file.
|
|
*/
|
|
}
|
|
|
|
/**
|
|
* @brief CLUT Transfer Complete callback.
|
|
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(hdma2d);
|
|
|
|
/* NOTE : This function should not be modified; when the callback is needed,
|
|
the HAL_DMA2D_CLUTLoadingCpltCallback can be implemented in the user file.
|
|
*/
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup DMA2D_Exported_Functions_Group3 Peripheral Control functions
|
|
* @brief Peripheral Control functions
|
|
*
|
|
@verbatim
|
|
===============================================================================
|
|
##### Peripheral Control functions #####
|
|
===============================================================================
|
|
[..] This section provides functions allowing to:
|
|
(+) Configure the DMA2D foreground or background layer parameters.
|
|
(+) Configure the DMA2D CLUT transfer.
|
|
(+) Configure the line watermark
|
|
(+) Configure the dead time value.
|
|
(+) Enable or disable the dead time value functionality.
|
|
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Configure the DMA2D Layer according to the specified
|
|
* parameters in the DMA2D_HandleTypeDef.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param LayerIdx DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
|
|
{
|
|
DMA2D_LayerCfgTypeDef *pLayerCfg;
|
|
uint32_t regMask;
|
|
uint32_t regValue;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LAYER(LayerIdx));
|
|
assert_param(IS_DMA2D_OFFSET(hdma2d->LayerCfg[LayerIdx].InputOffset));
|
|
if (hdma2d->Init.Mode != DMA2D_R2M)
|
|
{
|
|
assert_param(IS_DMA2D_INPUT_COLOR_MODE(hdma2d->LayerCfg[LayerIdx].InputColorMode));
|
|
if (hdma2d->Init.Mode != DMA2D_M2M)
|
|
{
|
|
assert_param(IS_DMA2D_ALPHA_MODE(hdma2d->LayerCfg[LayerIdx].AlphaMode));
|
|
}
|
|
}
|
|
#if defined (DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
|
|
assert_param(IS_DMA2D_ALPHA_INVERTED(hdma2d->LayerCfg[LayerIdx].AlphaInverted));
|
|
assert_param(IS_DMA2D_RB_SWAP(hdma2d->LayerCfg[LayerIdx].RedBlueSwap));
|
|
#endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
|
|
|
|
/* Prepare the value to be written to the BGPFCCR or FGPFCCR register */
|
|
#if defined (DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
|
|
regValue = pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << DMA2D_BGPFCCR_AM_Pos) | \
|
|
(pLayerCfg->AlphaInverted << DMA2D_BGPFCCR_AI_Pos) | (pLayerCfg->RedBlueSwap << DMA2D_BGPFCCR_RBS_Pos);
|
|
regMask = (DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA | DMA2D_BGPFCCR_AI | DMA2D_BGPFCCR_RBS);
|
|
#else
|
|
regValue = pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << DMA2D_BGPFCCR_AM_Pos);
|
|
regMask = DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA;
|
|
#endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
|
|
|
|
|
|
if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
|
|
{
|
|
regValue |= (pLayerCfg->InputAlpha & DMA2D_BGPFCCR_ALPHA);
|
|
}
|
|
else
|
|
{
|
|
regValue |= (pLayerCfg->InputAlpha << DMA2D_BGPFCCR_ALPHA_Pos);
|
|
}
|
|
|
|
/* Configure the background DMA2D layer */
|
|
if (LayerIdx == DMA2D_BACKGROUND_LAYER)
|
|
{
|
|
/* Write DMA2D BGPFCCR register */
|
|
MODIFY_REG(hdma2d->Instance->BGPFCCR, regMask, regValue);
|
|
|
|
/* DMA2D BGOR register configuration -------------------------------------*/
|
|
WRITE_REG(hdma2d->Instance->BGOR, pLayerCfg->InputOffset);
|
|
|
|
/* DMA2D BGCOLR register configuration -------------------------------------*/
|
|
if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
|
|
{
|
|
WRITE_REG(hdma2d->Instance->BGCOLR, pLayerCfg->InputAlpha & (DMA2D_BGCOLR_BLUE | DMA2D_BGCOLR_GREEN | \
|
|
DMA2D_BGCOLR_RED));
|
|
}
|
|
}
|
|
/* Configure the foreground DMA2D layer */
|
|
else
|
|
{
|
|
|
|
|
|
/* Write DMA2D FGPFCCR register */
|
|
MODIFY_REG(hdma2d->Instance->FGPFCCR, regMask, regValue);
|
|
|
|
/* DMA2D FGOR register configuration -------------------------------------*/
|
|
WRITE_REG(hdma2d->Instance->FGOR, pLayerCfg->InputOffset);
|
|
|
|
/* DMA2D FGCOLR register configuration -------------------------------------*/
|
|
if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
|
|
{
|
|
WRITE_REG(hdma2d->Instance->FGCOLR, pLayerCfg->InputAlpha & (DMA2D_FGCOLR_BLUE | DMA2D_FGCOLR_GREEN | \
|
|
DMA2D_FGCOLR_RED));
|
|
}
|
|
}
|
|
/* Initialize the DMA2D state*/
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Configure the DMA2D CLUT Transfer.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param CLUTCfg Pointer to a DMA2D_CLUTCfgTypeDef structure that contains
|
|
* the configuration information for the color look up table.
|
|
* @param LayerIdx DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)
|
|
* @note API obsolete and maintained for compatibility with legacy. User is invited
|
|
* to resort to HAL_DMA2D_CLUTStartLoad() instead to benefit from code compactness,
|
|
* code size and improved heap usage.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LAYER(LayerIdx));
|
|
assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
|
|
assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Configure the CLUT of the background DMA2D layer */
|
|
if (LayerIdx == DMA2D_BACKGROUND_LAYER)
|
|
{
|
|
/* Write background CLUT memory address */
|
|
WRITE_REG(hdma2d->Instance->BGCMAR, (uint32_t)CLUTCfg.pCLUT);
|
|
|
|
/* Write background CLUT size and CLUT color mode */
|
|
MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),
|
|
((CLUTCfg.Size << DMA2D_BGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_BGPFCCR_CCM_Pos)));
|
|
}
|
|
/* Configure the CLUT of the foreground DMA2D layer */
|
|
else
|
|
{
|
|
/* Write foreground CLUT memory address */
|
|
WRITE_REG(hdma2d->Instance->FGCMAR, (uint32_t)CLUTCfg.pCLUT);
|
|
|
|
/* Write foreground CLUT size and CLUT color mode */
|
|
MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM),
|
|
((CLUTCfg.Size << DMA2D_FGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_FGPFCCR_CCM_Pos)));
|
|
}
|
|
|
|
/* Set the DMA2D state to Ready*/
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Configure the line watermark.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param Line Line Watermark configuration (maximum 16-bit long value expected).
|
|
* @note HAL_DMA2D_ProgramLineEvent() API enables the transfer watermark interrupt.
|
|
* @note The transfer watermark interrupt is disabled once it has occurred.
|
|
* @retval HAL status
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
|
|
{
|
|
/* Check the parameters */
|
|
if (Line > DMA2D_LWR_LW)
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
else
|
|
{
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Sets the Line watermark configuration */
|
|
WRITE_REG(hdma2d->Instance->LWR, Line);
|
|
|
|
/* Enable the Line interrupt */
|
|
__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TW);
|
|
|
|
/* Initialize the DMA2D state*/
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Enable DMA2D dead time feature.
|
|
* @param hdma2d DMA2D handle.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
/* Process Locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Set DMA2D_AMTCR EN bit */
|
|
SET_BIT(hdma2d->Instance->AMTCR, DMA2D_AMTCR_EN);
|
|
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Disable DMA2D dead time feature.
|
|
* @param hdma2d DMA2D handle.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
/* Process Locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Clear DMA2D_AMTCR EN bit */
|
|
CLEAR_BIT(hdma2d->Instance->AMTCR, DMA2D_AMTCR_EN);
|
|
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Configure dead time.
|
|
* @note The dead time value represents the guaranteed minimum number of cycles between
|
|
* two consecutive transactions on the AHB bus.
|
|
* @param hdma2d DMA2D handle.
|
|
* @param DeadTime dead time value.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t DeadTime)
|
|
{
|
|
/* Process Locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Set DMA2D_AMTCR DT field */
|
|
MODIFY_REG(hdma2d->Instance->AMTCR, DMA2D_AMTCR_DT, (((uint32_t) DeadTime) << DMA2D_AMTCR_DT_Pos));
|
|
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
|
|
/** @defgroup DMA2D_Exported_Functions_Group4 Peripheral State and Error functions
|
|
* @brief Peripheral State functions
|
|
*
|
|
@verbatim
|
|
===============================================================================
|
|
##### Peripheral State and Errors functions #####
|
|
===============================================================================
|
|
[..]
|
|
This subsection provides functions allowing to:
|
|
(+) Get the DMA2D state
|
|
(+) Get the DMA2D error code
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Return the DMA2D state
|
|
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @retval HAL state
|
|
*/
|
|
HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
return hdma2d->State;
|
|
}
|
|
|
|
/**
|
|
* @brief Return the DMA2D error code
|
|
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for DMA2D.
|
|
* @retval DMA2D Error Code
|
|
*/
|
|
uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
return hdma2d->ErrorCode;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
|
|
/** @defgroup DMA2D_Private_Functions DMA2D Private Functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Set the DMA2D transfer parameters.
|
|
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DMA2D.
|
|
* @param pdata The source memory Buffer address
|
|
* @param DstAddress The destination memory Buffer address
|
|
* @param Width The width of data to be transferred from source to destination.
|
|
* @param Height The height of data to be transferred from source to destination.
|
|
* @retval HAL status
|
|
*/
|
|
static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width,
|
|
uint32_t Height)
|
|
{
|
|
uint32_t tmp;
|
|
uint32_t tmp1;
|
|
uint32_t tmp2;
|
|
uint32_t tmp3;
|
|
uint32_t tmp4;
|
|
|
|
/* Configure DMA2D data size */
|
|
MODIFY_REG(hdma2d->Instance->NLR, (DMA2D_NLR_NL | DMA2D_NLR_PL), (Height | (Width << DMA2D_NLR_PL_Pos)));
|
|
|
|
/* Configure DMA2D destination address */
|
|
WRITE_REG(hdma2d->Instance->OMAR, DstAddress);
|
|
|
|
/* Register to memory DMA2D mode selected */
|
|
if (hdma2d->Init.Mode == DMA2D_R2M)
|
|
{
|
|
tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
|
|
tmp2 = pdata & DMA2D_OCOLR_RED_1;
|
|
tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
|
|
tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
|
|
|
|
/* Prepare the value to be written to the OCOLR register according to the color mode */
|
|
if (hdma2d->Init.ColorMode == DMA2D_OUTPUT_ARGB8888)
|
|
{
|
|
tmp = (tmp3 | tmp2 | tmp1 | tmp4);
|
|
}
|
|
else if (hdma2d->Init.ColorMode == DMA2D_OUTPUT_RGB888)
|
|
{
|
|
tmp = (tmp3 | tmp2 | tmp4);
|
|
}
|
|
else if (hdma2d->Init.ColorMode == DMA2D_OUTPUT_RGB565)
|
|
{
|
|
tmp2 = (tmp2 >> 19U);
|
|
tmp3 = (tmp3 >> 10U);
|
|
tmp4 = (tmp4 >> 3U);
|
|
tmp = ((tmp3 << 5U) | (tmp2 << 11U) | tmp4);
|
|
}
|
|
else if (hdma2d->Init.ColorMode == DMA2D_OUTPUT_ARGB1555)
|
|
{
|
|
tmp1 = (tmp1 >> 31U);
|
|
tmp2 = (tmp2 >> 19U);
|
|
tmp3 = (tmp3 >> 11U);
|
|
tmp4 = (tmp4 >> 3U);
|
|
tmp = ((tmp3 << 5U) | (tmp2 << 10U) | (tmp1 << 15U) | tmp4);
|
|
}
|
|
else /* Dhdma2d->Init.ColorMode = DMA2D_OUTPUT_ARGB4444 */
|
|
{
|
|
tmp1 = (tmp1 >> 28U);
|
|
tmp2 = (tmp2 >> 20U);
|
|
tmp3 = (tmp3 >> 12U);
|
|
tmp4 = (tmp4 >> 4U);
|
|
tmp = ((tmp3 << 4U) | (tmp2 << 8U) | (tmp1 << 12U) | tmp4);
|
|
}
|
|
/* Write to DMA2D OCOLR register */
|
|
WRITE_REG(hdma2d->Instance->OCOLR, tmp);
|
|
}
|
|
else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
|
|
{
|
|
/* Configure DMA2D source address */
|
|
WRITE_REG(hdma2d->Instance->FGMAR, pdata);
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
#endif /* DMA2D */
|
|
#endif /* HAL_DMA2D_MODULE_ENABLED */
|