enable cache
This commit is contained in:
@@ -4,6 +4,9 @@ ADC3.Channel-IN0=ADC_CHANNEL_0
|
||||
ADC3.ExternalTrigConv=ADC_EXTERNALTRIGCONV_T1_CC1
|
||||
ADC3.ExternalTrigConvEdge=ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING
|
||||
ADC3.IPParameters=Channel-IN0,Channel-0\#ChannelRegularConversion,ExternalTrigConv,ExternalTrigConvEdge
|
||||
CORTEX_M7.CPU_DCache=Enabled
|
||||
CORTEX_M7.CPU_ICache=Enabled
|
||||
CORTEX_M7.IPParameters=CPU_ICache,CPU_DCache
|
||||
FMC.CASLatency1=FMC_SDRAM_CAS_LATENCY_3
|
||||
FMC.ExitSelfRefreshDelay1=7
|
||||
FMC.IPParameters=CASLatency1,SDClockPeriod1,SDClockPeriod2,ReadBurst1,ReadBurst2,LoadToActiveDelay1,ExitSelfRefreshDelay1,SelfRefreshTime1,RowCycleDelay1,RowCycleDelay2,WriteRecoveryTime1,RPDelay1,RPDelay2,RCDDelay1
|
||||
|
||||
Reference in New Issue
Block a user