mirror of
https://github.com/Klagarge/Cursor.git
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2072 lines
26 KiB
Plaintext
2072 lines
26 KiB
Plaintext
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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(DmPackageRef
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library "ieee"
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library "ieee"
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unitName "numeric_std"
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itemName "ALL"
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libraryRefs [
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version "26.1"
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tm "EolColHdrMgr"
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uid 229,0
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port (LogicalPort
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uid 618,0
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port (LogicalPort
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uid 708,0
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port (LogicalPort
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decl (Decl
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tm "GroupColHdrMgr"
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tm "GenericTypeColHdrMgr"
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tm "GenericEolColHdrMgr"
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VExpander (VariableExpander
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vvMap [
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variable " "
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value " "
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variable "HDLDir"
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value "R:\\SYND\\Ele_2131\\ELN\\Labs\\Libraries\\Lcd\\hdl"
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)
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(vvPair
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variable "HDSDir"
|
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value "R:\\SYND\\Ele_2131\\ELN\\Labs\\Libraries\\Lcd\\hds"
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)
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(vvPair
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|
variable "SideDataDesignDir"
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|
value "R:\\SYND\\Ele_2131\\ELN\\Labs\\Libraries\\Lcd\\hds\\lcd@character@encoder\\symbol.sb.info"
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)
|
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(vvPair
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|
variable "SideDataUserDir"
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|
value "R:\\SYND\\Ele_2131\\ELN\\Labs\\Libraries\\Lcd\\hds\\lcd@character@encoder\\symbol.sb.user"
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)
|
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(vvPair
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|
variable "SourceDir"
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value "R:\\SYND\\Ele_2131\\ELN\\Labs\\Libraries\\Lcd\\hds"
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)
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(vvPair
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variable "appl"
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value "HDL Designer"
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)
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(vvPair
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|
variable "arch_name"
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value "symbol"
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)
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(vvPair
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variable "concat_file"
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value "concatenated"
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)
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(vvPair
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variable "config"
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value "%(unit)_%(view)_config"
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)
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(vvPair
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variable "d"
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value "R:\\SYND\\Ele_2131\\ELN\\Labs\\Libraries\\Lcd\\hds\\lcd@character@encoder"
|
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)
|
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(vvPair
|
|
variable "d_logical"
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value "R:\\SYND\\Ele_2131\\ELN\\Labs\\Libraries\\Lcd\\hds\\lcdCharacterEncoder"
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|
)
|
|
(vvPair
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|
variable "date"
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value "14.12.2017"
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)
|
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(vvPair
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|
variable "day"
|
|
value "Do"
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|
)
|
|
(vvPair
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|
variable "day_long"
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value "Donnerstag"
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)
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(vvPair
|
|
variable "dd"
|
|
value "14"
|
|
)
|
|
(vvPair
|
|
variable "designName"
|
|
value "$DESIGN_NAME"
|
|
)
|
|
(vvPair
|
|
variable "entity_name"
|
|
value "lcdCharacterEncoder"
|
|
)
|
|
(vvPair
|
|
variable "ext"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "f"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "f_logical"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "f_noext"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_author"
|
|
value "oliver.gubler"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_date"
|
|
value "14.12.2017"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_group"
|
|
value "UNKNOWN"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_host"
|
|
value "WE5370"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_time"
|
|
value "10:21:59"
|
|
)
|
|
(vvPair
|
|
variable "group"
|
|
value "UNKNOWN"
|
|
)
|
|
(vvPair
|
|
variable "host"
|
|
value "WE5370"
|
|
)
|
|
(vvPair
|
|
variable "language"
|
|
value "VHDL"
|
|
)
|
|
(vvPair
|
|
variable "library"
|
|
value "LCD"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_Concatenation"
|
|
value "$HDS_PROJECT_DIR/../libs/SPI/concat"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_HdsLintPlugin"
|
|
value "$HDS_PROJECT_DIR/../libs/SPI/designcheck"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_ModelSimCompiler"
|
|
value "$HEI_LIBS_DIR/LCD/work"
|
|
)
|
|
(vvPair
|
|
variable "mm"
|
|
value "12"
|
|
)
|
|
(vvPair
|
|
variable "module_name"
|
|
value "lcdCharacterEncoder"
|
|
)
|
|
(vvPair
|
|
variable "month"
|
|
value "Dez"
|
|
)
|
|
(vvPair
|
|
variable "month_long"
|
|
value "Dezember"
|
|
)
|
|
(vvPair
|
|
variable "p"
|
|
value "R:\\SYND\\Ele_2131\\ELN\\Labs\\Libraries\\Lcd\\hds\\lcd@character@encoder\\symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "p_logical"
|
|
value "R:\\SYND\\Ele_2131\\ELN\\Labs\\Libraries\\Lcd\\hds\\lcdCharacterEncoder\\symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "package_name"
|
|
value "<Undefined Variable>"
|
|
)
|
|
(vvPair
|
|
variable "project_name"
|
|
value "ElN_chrono"
|
|
)
|
|
(vvPair
|
|
variable "series"
|
|
value "HDL Designer Series"
|
|
)
|
|
(vvPair
|
|
variable "task_ADMS"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_ActelPath"
|
|
value "$LIBERO_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ActelProjectPath"
|
|
value "$LIBERO_SCRATCH_WORK_DIR"
|
|
)
|
|
(vvPair
|
|
variable "task_DesignCompilerPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_HDSPath"
|
|
value "$HDS_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEBinPath"
|
|
value "$ISE_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEPath"
|
|
value "$ISE_SCRATCH_WORK_DIR"
|
|
)
|
|
(vvPair
|
|
variable "task_LeonardoPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_LiberoDir"
|
|
value "$HDS_LIBERO_DIR"
|
|
)
|
|
(vvPair
|
|
variable "task_ModelSimPath"
|
|
value "$MODELSIM_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_NC"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_PrecisionRTLPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_QuestaSimPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_VCSPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "this_ext"
|
|
value "sb"
|
|
)
|
|
(vvPair
|
|
variable "this_file"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "this_file_logical"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "time"
|
|
value "10:21:59"
|
|
)
|
|
(vvPair
|
|
variable "unit"
|
|
value "lcdCharacterEncoder"
|
|
)
|
|
(vvPair
|
|
variable "user"
|
|
value "oliver.gubler"
|
|
)
|
|
(vvPair
|
|
variable "version"
|
|
value "2015.2 (Build 5)"
|
|
)
|
|
(vvPair
|
|
variable "view"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "year"
|
|
value "2017"
|
|
)
|
|
(vvPair
|
|
variable "yy"
|
|
value "17"
|
|
)
|
|
]
|
|
)
|
|
LanguageMgr "VhdlLangMgr"
|
|
uid 19,0
|
|
optionalChildren [
|
|
*83 (SymbolBody
|
|
uid 8,0
|
|
optionalChildren [
|
|
*84 (CptPort
|
|
uid 76,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 77,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "39250,-4375,40000,-3625"
|
|
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|
|
tg (CPTG
|
|
uid 78,0
|
|
ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
|
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|
|
uid 79,0
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va (VaSet
|
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font "Verdana,9,0"
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xt "41000,-4600,46500,-3400"
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st "asciiData"
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blo "41000,-3600"
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|
tm "CptPortNameMgr"
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)
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)
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dt (MLText
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uid 80,0
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va (VaSet
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font "Courier New,8,0"
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xt "2000,-11000,36500,-10200"
|
|
st "asciiData : IN std_ulogic_vector (asciiBitNb-1 downto 0) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "asciiData"
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t "std_ulogic_vector"
|
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b "(asciiBitNb-1 downto 0)"
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|
suid 1,0
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)
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)
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)
|
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*85 (CptPort
|
|
uid 81,0
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ps "OnEdgeStrategy"
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shape (Triangle
|
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uid 82,0
|
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|
|
va (VaSet
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vasetType 1
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fg "0,65535,0"
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|
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|
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xt "56000,-4375,56750,-3625"
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tg (CPTG
|
|
uid 83,0
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|
ps "CptPortTextPlaceStrategy"
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stg "RightVerticalLayoutStrategy"
|
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f (Text
|
|
uid 84,0
|
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va (VaSet
|
|
font "Verdana,9,0"
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)
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xt "50400,-4600,55000,-3400"
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st "lcdData"
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|
ju 2
|
|
blo "55000,-3600"
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tm "CptPortNameMgr"
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)
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dt (MLText
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uid 85,0
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va (VaSet
|
|
font "Courier New,8,0"
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)
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xt "2000,-11800,37500,-11000"
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st "lcdData : OUT std_ulogic_vector (lcdDataBitNb-1 downto 0) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "lcdData"
|
|
t "std_ulogic_vector"
|
|
b "(lcdDataBitNb-1 downto 0)"
|
|
o 3
|
|
suid 2,0
|
|
)
|
|
)
|
|
)
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*86 (CptPort
|
|
uid 219,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 220,0
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va (VaSet
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vasetType 1
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fg "0,65535,0"
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xt "39250,3625,40000,4375"
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|
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tg (CPTG
|
|
uid 221,0
|
|
ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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f (Text
|
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uid 222,0
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va (VaSet
|
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font "Verdana,9,0"
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)
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xt "41000,3400,44400,4600"
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st "clock"
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|
blo "41000,4400"
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tm "CptPortNameMgr"
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)
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)
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dt (MLText
|
|
uid 223,0
|
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va (VaSet
|
|
font "Courier New,8,0"
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)
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xt "2000,-13400,21000,-12600"
|
|
st "clock : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "clock"
|
|
t "std_ulogic"
|
|
o 1
|
|
suid 7,0
|
|
)
|
|
)
|
|
)
|
|
*87 (CptPort
|
|
uid 224,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 225,0
|
|
ro 90
|
|
va (VaSet
|
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vasetType 1
|
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fg "0,65535,0"
|
|
)
|
|
xt "39250,5625,40000,6375"
|
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)
|
|
tg (CPTG
|
|
uid 226,0
|
|
ps "CptPortTextPlaceStrategy"
|
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stg "VerticalLayoutStrategy"
|
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f (Text
|
|
uid 227,0
|
|
va (VaSet
|
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font "Verdana,9,0"
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|
)
|
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xt "41000,5400,44300,6600"
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|
st "reset"
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|
blo "41000,6400"
|
|
tm "CptPortNameMgr"
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)
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)
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dt (MLText
|
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uid 228,0
|
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va (VaSet
|
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font "Courier New,8,0"
|
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)
|
|
xt "2000,-12600,21000,-11800"
|
|
st "reset : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "reset"
|
|
t "std_ulogic"
|
|
o 2
|
|
suid 8,0
|
|
)
|
|
)
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)
|
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*88 (CptPort
|
|
uid 332,0
|
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 333,0
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ro 270
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va (VaSet
|
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vasetType 1
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fg "0,65535,0"
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tg (CPTG
|
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uid 334,0
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ps "CptPortTextPlaceStrategy"
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stg "RightVerticalLayoutStrategy"
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f (Text
|
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uid 335,0
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va (VaSet
|
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font "Verdana,9,0"
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)
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xt "50300,-600,55000,600"
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st "lcdBusy"
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|
ju 2
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blo "55000,400"
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tm "CptPortNameMgr"
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)
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dt (MLText
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uid 336,0
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va (VaSet
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font "Courier New,8,0"
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)
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xt "2000,-10200,21000,-9400"
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st "lcdBusy : IN std_ulogic ;"
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)
|
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thePort (LogicalPort
|
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decl (Decl
|
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n "lcdBusy"
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t "std_ulogic"
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|
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suid 12,0
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)
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)
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)
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*89 (CptPort
|
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uid 613,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 614,0
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ro 270
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va (VaSet
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vasetType 1
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xt "39250,-375,40000,375"
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tg (CPTG
|
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uid 615,0
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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uid 616,0
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va (VaSet
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font "Verdana,9,0"
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xt "41000,-600,46600,600"
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blo "41000,400"
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tm "CptPortNameMgr"
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uid 617,0
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va (VaSet
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font "Courier New,8,0"
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xt "2000,-9400,21000,-8600"
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st "asciiBusy : OUT std_ulogic ;"
|
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)
|
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thePort (LogicalPort
|
|
m 1
|
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decl (Decl
|
|
n "asciiBusy"
|
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t "std_ulogic"
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|
|
suid 20,0
|
|
)
|
|
)
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)
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*90 (CptPort
|
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uid 666,0
|
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 667,0
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va (VaSet
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vasetType 1
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tg (CPTG
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uid 668,0
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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|
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uid 669,0
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va (VaSet
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font "Verdana,9,0"
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xt "41000,-2600,46600,-1400"
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st "asciiSend"
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blo "41000,-1600"
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tm "CptPortNameMgr"
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dt (MLText
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uid 670,0
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va (VaSet
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font "Courier New,8,0"
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st "asciiSend : IN std_ulogic ;"
|
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)
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thePort (LogicalPort
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decl (Decl
|
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n "asciiSend"
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t "std_ulogic"
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suid 22,0
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)
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)
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)
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uid 703,0
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ps "OnEdgeStrategy"
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uid 704,0
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ro 90
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va (VaSet
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)
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tg (CPTG
|
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uid 705,0
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ps "CptPortTextPlaceStrategy"
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uid 706,0
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va (VaSet
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)
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st "lcdSend"
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|
ju 2
|
|
blo "55000,-1600"
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tm "CptPortNameMgr"
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)
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dt (MLText
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uid 707,0
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va (VaSet
|
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font "Courier New,8,0"
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)
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xt "2000,-7800,21000,-7000"
|
|
st "lcdSend : OUT std_ulogic ;"
|
|
)
|
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thePort (LogicalPort
|
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m 1
|
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decl (Decl
|
|
n "lcdSend"
|
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t "std_ulogic"
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|
suid 26,0
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)
|
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)
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)
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*92 (CptPort
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uid 949,0
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ps "OnEdgeStrategy"
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uid 1048,0
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ro 270
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va (VaSet
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vasetType 1
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tg (CPTG
|
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uid 951,0
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ps "CptPortTextPlaceStrategy"
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f (Text
|
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uid 952,0
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va (VaSet
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font "Verdana,9,0"
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xt "49500,2400,55000,3600"
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st "pixelData"
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ju 2
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blo "55000,3400"
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tm "CptPortNameMgr"
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dt (MLText
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uid 953,0
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va (VaSet
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font "Courier New,8,0"
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st "pixelData : IN std_ulogic_vector (fontColumnNb*fontRowNb-1 downto 0) ;"
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)
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thePort (LogicalPort
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decl (Decl
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n "pixelData"
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t "std_ulogic_vector"
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b "(fontColumnNb*fontRowNb-1 downto 0)"
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*93 (CptPort
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uid 1172,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 1173,0
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showHdrWhenContentsEmpty 1
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)
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elements [
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]
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)
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portInstanceVisAsIs 1
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portInstanceVis (PortSigDisplay
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sIVOD 1
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)
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portVis (PortSigDisplay
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sTC 0
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sIVOD 1
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)
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)
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defaultCptPort (CptPort
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ps "OnEdgeStrategy"
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shape (Triangle
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ro 90
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va (VaSet
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vasetType 1
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fg "0,65535,0"
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)
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xt "0,0,750,750"
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)
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tg (CPTG
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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f (Text
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va (VaSet
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font "Verdana,9,0"
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)
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xt "0,750,2500,1950"
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st "In0"
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blo "0,1750"
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tm "CptPortNameMgr"
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)
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)
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dt (MLText
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va (VaSet
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font "Courier New,8,0"
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)
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)
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thePort (LogicalPort
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decl (Decl
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n "In0"
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t "std_logic_vector"
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b "(15 DOWNTO 0)"
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o 0
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)
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)
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)
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defaultCptPortBuffer (CptPort
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ps "OnEdgeStrategy"
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shape (Diamond
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va (VaSet
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vasetType 1
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fg "65535,65535,65535"
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bg "0,0,0"
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)
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xt "0,0,750,750"
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)
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tg (CPTG
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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f (Text
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va (VaSet
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font "Verdana,9,0"
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)
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xt "0,750,4300,1950"
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st "Buffer0"
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blo "0,1750"
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tm "CptPortNameMgr"
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)
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)
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dt (MLText
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va (VaSet
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font "Courier New,8,0"
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)
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)
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thePort (LogicalPort
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m 3
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decl (Decl
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n "Buffer0"
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t "std_logic_vector"
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b "(15 DOWNTO 0)"
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o 0
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)
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)
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)
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DeclarativeBlock *110 (SymDeclBlock
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uid 1,0
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stg "SymDeclLayoutStrategy"
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declLabel (Text
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uid 2,0
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va (VaSet
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font "Verdana,9,1"
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)
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xt "0,-15800,7400,-14600"
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st "Declarations"
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blo "0,-14800"
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)
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portLabel (Text
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uid 3,0
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va (VaSet
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font "Verdana,9,1"
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)
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xt "0,-14600,3700,-13400"
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st "Ports:"
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blo "0,-13600"
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)
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externalLabel (Text
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uid 4,0
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va (VaSet
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font "Verdana,9,1"
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)
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xt "0,-5400,3200,-4200"
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st "User:"
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blo "0,-4400"
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)
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internalLabel (Text
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uid 6,0
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va (VaSet
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isHidden 1
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font "Verdana,9,1"
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)
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xt "0,-15800,8200,-14600"
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st "Internal User:"
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blo "0,-14800"
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)
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externalText (MLText
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uid 5,0
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va (VaSet
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font "Courier New,8,0"
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)
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xt "2000,-4200,2000,-4200"
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tm "SyDeclarativeTextMgr"
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)
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internalText (MLText
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uid 7,0
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va (VaSet
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isHidden 1
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font "Courier New,8,0"
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)
|
|
xt "0,-15800,0,-15800"
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tm "SyDeclarativeTextMgr"
|
|
)
|
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)
|
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lastUid 1201,0
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activeModelName "Symbol:GEN"
|
|
)
|