Klagarge/Cursor
1
0
Fork 0
mirror of https://github.com/Klagarge/Cursor.git synced 2025-10-31 14:09:17 +00:00
Code Issues Activity

Initial commit

Browse Source
This commit is contained in:
Rémi Heredero
2021-11-24 10:50:51 +01:00
commit c7ba678fbb
961 changed files with 501515 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
Libs/Gates/hdl/transUnsignedUlog_sim.vhd Normal file
View File

@@ -0,0 +1,4 @@
ARCHITECTURE sim OF transUnsignedUlog IS
BEGIN
out1 <= std_ulogic_vector(in1) after delay;
END ARCHITECTURE sim;