mirror of
				https://github.com/Klagarge/Cursor.git
				synced 2025-10-30 21:49:17 +00:00 
			
		
		
		
	correction
This commit is contained in:
		| @@ -55,7 +55,7 @@ value "pwmBitNb" | ||||
| (GiElement | ||||
| name "testLineNb" | ||||
| type "positive" | ||||
| value "testLineNb" | ||||
| value "0" | ||||
| ) | ||||
| ] | ||||
| mwi 0 | ||||
| @@ -122,19 +122,19 @@ value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\h | ||||
| ) | ||||
| (vvPair | ||||
| variable "date" | ||||
| value "17.12.2021" | ||||
| value "21.12.2021" | ||||
| ) | ||||
| (vvPair | ||||
| variable "day" | ||||
| value "ven." | ||||
| value "mar." | ||||
| ) | ||||
| (vvPair | ||||
| variable "day_long" | ||||
| value "vendredi" | ||||
| value "mardi" | ||||
| ) | ||||
| (vvPair | ||||
| variable "dd" | ||||
| value "17" | ||||
| value "21" | ||||
| ) | ||||
| (vvPair | ||||
| variable "designName" | ||||
| @@ -166,7 +166,7 @@ value "Simon" | ||||
| ) | ||||
| (vvPair | ||||
| variable "graphical_source_date" | ||||
| value "17.12.2021" | ||||
| value "21.12.2021" | ||||
| ) | ||||
| (vvPair | ||||
| variable "graphical_source_group" | ||||
| @@ -178,7 +178,7 @@ value "PC-SDM" | ||||
| ) | ||||
| (vvPair | ||||
| variable "graphical_source_time" | ||||
| value "09:37:57" | ||||
| value "13:58:56" | ||||
| ) | ||||
| (vvPair | ||||
| variable "group" | ||||
| @@ -302,7 +302,7 @@ value "struct" | ||||
| ) | ||||
| (vvPair | ||||
| variable "time" | ||||
| value "09:37:57" | ||||
| value "13:58:56" | ||||
| ) | ||||
| (vvPair | ||||
| variable "unit" | ||||
| @@ -347,8 +347,7 @@ va (VaSet | ||||
| isHidden 1 | ||||
| ) | ||||
| xt "-5000,32800,11300,34000" | ||||
| st "SIGNAL reset    : std_ulogic | ||||
| " | ||||
| st "SIGNAL reset    : std_ulogic" | ||||
| ) | ||||
| ) | ||||
| *2 (Net | ||||
| @@ -365,8 +364,7 @@ va (VaSet | ||||
| isHidden 1 | ||||
| ) | ||||
| xt "-5000,26800,11400,28000" | ||||
| st "SIGNAL clock    : std_ulogic | ||||
| " | ||||
| st "SIGNAL clock    : std_ulogic" | ||||
| ) | ||||
| ) | ||||
| *3 (Grouping | ||||
| @@ -768,8 +766,7 @@ isHidden 1 | ||||
| font "Verdana,8,0" | ||||
| ) | ||||
| xt "0,-1400,13600,-400" | ||||
| st "SIGNAL testMode : std_uLogic | ||||
| " | ||||
| st "SIGNAL testMode : std_uLogic" | ||||
| ) | ||||
| ) | ||||
| *19 (Net | ||||
| @@ -787,8 +784,7 @@ isHidden 1 | ||||
| font "Verdana,8,0" | ||||
| ) | ||||
| xt "0,-1400,13300,-400" | ||||
| st "SIGNAL sensor2  : std_uLogic | ||||
| " | ||||
| st "SIGNAL sensor2  : std_uLogic" | ||||
| ) | ||||
| ) | ||||
| *20 (Net | ||||
| @@ -806,8 +802,7 @@ isHidden 1 | ||||
| font "Verdana,8,0" | ||||
| ) | ||||
| xt "0,-1400,13300,-400" | ||||
| st "SIGNAL sensor1  : std_uLogic | ||||
| " | ||||
| st "SIGNAL sensor1  : std_uLogic" | ||||
| ) | ||||
| ) | ||||
| *21 (Net | ||||
| @@ -825,8 +820,7 @@ isHidden 1 | ||||
| font "Verdana,8,0" | ||||
| ) | ||||
| xt "0,-1400,13700,-400" | ||||
| st "SIGNAL motorOn  : std_uLogic | ||||
| " | ||||
| st "SIGNAL motorOn  : std_uLogic" | ||||
| ) | ||||
| ) | ||||
| *22 (Net | ||||
| @@ -844,8 +838,7 @@ isHidden 1 | ||||
| font "Verdana,8,0" | ||||
| ) | ||||
| xt "0,-1400,12900,-400" | ||||
| st "SIGNAL side1    : std_uLogic | ||||
| " | ||||
| st "SIGNAL side1    : std_uLogic" | ||||
| ) | ||||
| ) | ||||
| *23 (Net | ||||
| @@ -863,8 +856,7 @@ isHidden 1 | ||||
| font "Verdana,8,0" | ||||
| ) | ||||
| xt "0,-1400,12900,-400" | ||||
| st "SIGNAL side2    : std_uLogic | ||||
| " | ||||
| st "SIGNAL side2    : std_uLogic" | ||||
| ) | ||||
| ) | ||||
| *24 (Net | ||||
| @@ -882,8 +874,7 @@ isHidden 1 | ||||
| font "Verdana,8,0" | ||||
| ) | ||||
| xt "0,-1400,12900,-400" | ||||
| st "SIGNAL go2      : std_uLogic | ||||
| " | ||||
| st "SIGNAL go2      : std_uLogic" | ||||
| ) | ||||
| ) | ||||
| *25 (Net | ||||
| @@ -901,8 +892,7 @@ isHidden 1 | ||||
| font "Verdana,8,0" | ||||
| ) | ||||
| xt "0,-1400,12900,-400" | ||||
| st "SIGNAL go1      : std_uLogic | ||||
| " | ||||
| st "SIGNAL go1      : std_uLogic" | ||||
| ) | ||||
| ) | ||||
| *26 (Net | ||||
| @@ -920,8 +910,7 @@ isHidden 1 | ||||
| font "Verdana,8,0" | ||||
| ) | ||||
| xt "0,-1400,12800,-400" | ||||
| st "SIGNAL restart  : std_uLogic | ||||
| " | ||||
| st "SIGNAL restart  : std_uLogic" | ||||
| ) | ||||
| ) | ||||
| *27 (Net | ||||
| @@ -939,8 +928,7 @@ isHidden 1 | ||||
| font "Verdana,8,0" | ||||
| ) | ||||
| xt "0,-1400,13400,-400" | ||||
| st "SIGNAL encoderI : std_uLogic | ||||
| " | ||||
| st "SIGNAL encoderI : std_uLogic" | ||||
| ) | ||||
| ) | ||||
| *28 (Net | ||||
| @@ -958,8 +946,7 @@ isHidden 1 | ||||
| font "Verdana,8,0" | ||||
| ) | ||||
| xt "0,-1400,13600,-400" | ||||
| st "SIGNAL encoderB : std_uLogic | ||||
| " | ||||
| st "SIGNAL encoderB : std_uLogic" | ||||
| ) | ||||
| ) | ||||
| *29 (Net | ||||
| @@ -977,8 +964,7 @@ isHidden 1 | ||||
| font "Verdana,8,0" | ||||
| ) | ||||
| xt "0,-1400,13600,-400" | ||||
| st "SIGNAL encoderA : std_uLogic | ||||
| " | ||||
| st "SIGNAL encoderA : std_uLogic" | ||||
| ) | ||||
| ) | ||||
| *30 (Net | ||||
| @@ -995,8 +981,7 @@ va (VaSet | ||||
| isHidden 1 | ||||
| ) | ||||
| xt "0,-1400,17300,-200" | ||||
| st "SIGNAL button4  : std_uLogic | ||||
| " | ||||
| st "SIGNAL button4  : std_uLogic" | ||||
| ) | ||||
| ) | ||||
| *31 (SaComponent | ||||
| @@ -1023,9 +1008,9 @@ uid 4590,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "40000,62300,43500,63600" | ||||
| xt "40000,62300,43800,63700" | ||||
| st "clock" | ||||
| blo "40000,63300" | ||||
| blo "40000,63500" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1058,9 +1043,9 @@ uid 4595,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "40000,64300,43500,65600" | ||||
| xt "40000,64300,44100,65700" | ||||
| st "reset" | ||||
| blo "40000,65300" | ||||
| blo "40000,65500" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1093,10 +1078,10 @@ uid 4600,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "50500,40400,54000,41700" | ||||
| xt "49800,40400,54000,41800" | ||||
| st "side1" | ||||
| ju 2 | ||||
| blo "54000,41400" | ||||
| blo "54000,41600" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1130,9 +1115,9 @@ uid 4605,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "40000,38300,44900,39600" | ||||
| xt "40000,38300,45100,39700" | ||||
| st "restart" | ||||
| blo "40000,39300" | ||||
| blo "40000,39500" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1165,9 +1150,9 @@ uid 4610,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "40000,42300,42100,43600" | ||||
| xt "40000,42300,43200,43700" | ||||
| st "go2" | ||||
| blo "40000,43300" | ||||
| blo "40000,43500" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1200,10 +1185,10 @@ uid 4615,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "49100,46400,54000,47700" | ||||
| xt "48100,46400,54000,47800" | ||||
| st "sensor1" | ||||
| ju 2 | ||||
| blo "54000,47400" | ||||
| blo "54000,47600" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1236,9 +1221,9 @@ uid 4620,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "40000,60300,45600,61600" | ||||
| xt "40000,60300,46700,61700" | ||||
| st "testMode" | ||||
| blo "40000,61300" | ||||
| blo "40000,61500" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1270,10 +1255,10 @@ uid 4625,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "44700,36000,49600,37300" | ||||
| xt "44000,36000,49600,37400" | ||||
| st "testOut" | ||||
| ju 2 | ||||
| blo "49600,37000" | ||||
| blo "49600,37200" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1281,7 +1266,7 @@ m 1 | ||||
| decl (Decl | ||||
| n "testOut" | ||||
| t "std_uLogic_vector" | ||||
| b "(1 TO testLineNb)" | ||||
| b "(1 DOWNTO 0)" | ||||
| o 21 | ||||
| suid 8,0 | ||||
| ) | ||||
| @@ -1308,9 +1293,9 @@ uid 4630,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "40000,40300,42100,41600" | ||||
| xt "40000,40300,43200,41700" | ||||
| st "go1" | ||||
| blo "40000,41300" | ||||
| blo "40000,41500" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1343,10 +1328,10 @@ uid 4635,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "50500,42400,54000,43700" | ||||
| xt "49800,42400,54000,43800" | ||||
| st "side2" | ||||
| ju 2 | ||||
| blo "54000,43400" | ||||
| blo "54000,43600" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1380,10 +1365,10 @@ uid 4640,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "49100,48300,54000,49600" | ||||
| xt "48100,48300,54000,49700" | ||||
| st "sensor2" | ||||
| ju 2 | ||||
| blo "54000,49300" | ||||
| blo "54000,49500" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1416,10 +1401,10 @@ uid 4645,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "49100,38400,54000,39700" | ||||
| xt "47700,38400,54000,39800" | ||||
| st "motorOn" | ||||
| ju 2 | ||||
| blo "54000,39400" | ||||
| blo "54000,39600" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1453,10 +1438,10 @@ uid 4650,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "48400,52400,54000,53700" | ||||
| xt "47300,52400,54000,53800" | ||||
| st "encoderA" | ||||
| ju 2 | ||||
| blo "54000,53400" | ||||
| blo "54000,53600" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1489,10 +1474,10 @@ uid 4655,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "48400,54400,54000,55700" | ||||
| xt "47300,54400,54000,55800" | ||||
| st "encoderB" | ||||
| ju 2 | ||||
| blo "54000,55400" | ||||
| blo "54000,55600" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1525,10 +1510,10 @@ uid 4660,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "48400,56400,54000,57700" | ||||
| xt "47600,56400,54000,57800" | ||||
| st "encoderI" | ||||
| ju 2 | ||||
| blo "54000,57400" | ||||
| blo "54000,57600" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1561,9 +1546,9 @@ uid 4665,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "40000,44300,44900,45600" | ||||
| xt "40000,44300,45800,45700" | ||||
| st "button4" | ||||
| blo "40000,45300" | ||||
| blo "40000,45500" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1596,9 +1581,9 @@ uid 4670,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "40000,48300,43500,49600" | ||||
| xt "40000,48300,44900,49700" | ||||
| st "CS1_n" | ||||
| blo "40000,49300" | ||||
| blo "40000,49500" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1632,9 +1617,9 @@ uid 4675,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "40000,50300,42100,51600" | ||||
| xt "40000,50300,43200,51700" | ||||
| st "SCL" | ||||
| blo "40000,51300" | ||||
| blo "40000,51500" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1668,9 +1653,9 @@ uid 4680,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "40000,52300,41400,53600" | ||||
| xt "40000,52300,42100,53700" | ||||
| st "SI" | ||||
| blo "40000,53300" | ||||
| blo "40000,53500" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1704,9 +1689,9 @@ uid 4685,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "40000,54300,41400,55600" | ||||
| xt "40000,54300,42400,55700" | ||||
| st "A0" | ||||
| blo "40000,55300" | ||||
| blo "40000,55500" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1740,9 +1725,9 @@ uid 4690,0 | ||||
| va (VaSet | ||||
| font "Verdana,12,0" | ||||
| ) | ||||
| xt "40000,56300,43500,57600" | ||||
| xt "40000,56300,44700,57700" | ||||
| st "RST_n" | ||||
| blo "40000,57300" | ||||
| blo "40000,57500" | ||||
| ) | ||||
| ) | ||||
| thePort (LogicalPort | ||||
| @@ -1820,7 +1805,7 @@ position1       = position1          ( positive ) | ||||
| position2       = position2          ( positive )   | ||||
| slopeShiftBitNb = slopeShiftBitNb    ( positive )   | ||||
| pwmBitNb        = pwmBitNb           ( positive )   | ||||
| testLineNb      = testLineNb         ( positive )  " | ||||
| testLineNb      = 0                  ( positive )  " | ||||
| ) | ||||
| header "" | ||||
| ) | ||||
| @@ -1853,11 +1838,10 @@ value "pwmBitNb" | ||||
| (GiElement | ||||
| name "testLineNb" | ||||
| type "positive" | ||||
| value "testLineNb" | ||||
| value "0" | ||||
| ) | ||||
| ] | ||||
| ) | ||||
| connectByName 1 | ||||
| portVis (PortSigDisplay | ||||
| sTC 0 | ||||
| sT 1 | ||||
| @@ -2546,8 +2530,8 @@ tm "BdCompilerDirectivesTextMgr" | ||||
| ] | ||||
| associable 1 | ||||
| ) | ||||
| windowSize "-8,-8,1722,1111" | ||||
| viewArea "-8600,-4000,158289,106111" | ||||
| windowSize "0,0,1715,1119" | ||||
| viewArea "-8938,13684,103005,88288" | ||||
| cachedDiagramExtent "-7000,-1400,102000,93000" | ||||
| pageSetupInfo (PageSetupInfo | ||||
| ptrCmd "\\\\ipp://ipp.hevs.ch\\PREA309_HPLJP3005DN,winspool," | ||||
| @@ -2574,7 +2558,7 @@ boundaryWidth 0 | ||||
| ) | ||||
| hasePageBreakOrigin 1 | ||||
| pageBreakOrigin "-7000,19000" | ||||
| lastUid 5464,0 | ||||
| lastUid 5517,0 | ||||
| defaultCommentText (CommentText | ||||
| shape (Rectangle | ||||
| layer 0 | ||||
|   | ||||
		Reference in New Issue
	
	Block a user