From 459892bb13dbaa80bdc6549930cef331681c82af Mon Sep 17 00:00:00 2001 From: LordBaryhobal Date: Tue, 30 Jun 2026 18:48:34 +0200 Subject: [PATCH] refactor: centralize cetz import --- doc/example.typ | 2 +- gallery/test3.typ | 1 - gallery/test4.typ | 2 +- gallery/test5.typ | 2 +- gallery/test6.typ | 2 +- gallery/test7.typ | 1 - manual.typ | 2 +- src/cetz.typ | 1 + src/circuit.typ | 2 +- src/elements/alu.typ | 2 +- src/elements/block.typ | 2 +- src/elements/element.typ | 2 +- src/elements/extender.typ | 2 +- src/elements/group.typ | 2 +- src/elements/logic/and.typ | 2 +- src/elements/logic/buf.typ | 2 +- src/elements/logic/gate.typ | 2 +- src/elements/logic/iec_and.typ | 2 +- src/elements/logic/iec_buf.typ | 2 +- src/elements/logic/iec_gate.typ | 2 +- src/elements/logic/iec_or.typ | 2 +- src/elements/logic/iec_xor.typ | 2 +- src/elements/logic/or.typ | 2 +- src/elements/logic/xor.typ | 2 +- src/elements/multiplexer.typ | 2 +- src/elements/ports.typ | 2 +- src/wire.typ | 2 +- 27 files changed, 25 insertions(+), 26 deletions(-) create mode 100644 src/cetz.typ diff --git a/doc/example.typ b/doc/example.typ index 7e7af59..32f35b8 100644 --- a/doc/example.typ +++ b/doc/example.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "../src/circuit.typ": circuit #import "../src/util.typ" diff --git a/gallery/test3.typ b/gallery/test3.typ index 89db692..f76ff96 100644 --- a/gallery/test3.typ +++ b/gallery/test3.typ @@ -1,4 +1,3 @@ -#import "@preview/cetz:0.3.2": draw #import "../src/lib.typ": circuit, element, util, wire #set page(width: auto, height: auto, margin: .5cm) diff --git a/gallery/test4.typ b/gallery/test4.typ index 08f8d00..34df961 100644 --- a/gallery/test4.typ +++ b/gallery/test4.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "../src/lib.typ": * #set page(width: auto, height: auto, margin: .5cm) diff --git a/gallery/test5.typ b/gallery/test5.typ index ebf6e77..22fcecd 100644 --- a/gallery/test5.typ +++ b/gallery/test5.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "../src/lib.typ": * #set page(width: auto, height: auto, margin: .5cm) diff --git a/gallery/test6.typ b/gallery/test6.typ index ba76c94..c49944e 100644 --- a/gallery/test6.typ +++ b/gallery/test6.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw, vector +#import "/src/cetz.typ": draw #import "../src/lib.typ": * #set page(width: auto, height: auto, margin: .5cm) diff --git a/gallery/test7.typ b/gallery/test7.typ index 94a70e3..9a5f747 100644 --- a/gallery/test7.typ +++ b/gallery/test7.typ @@ -1,4 +1,3 @@ -#import "@preview/cetz:0.3.2": draw #import "../src/lib.typ": circuit, element, util, wire #set page(width: auto, height: auto, margin: .5cm) diff --git a/manual.typ b/manual.typ index b6bde05..6fc50d8 100644 --- a/manual.typ +++ b/manual.typ @@ -1,5 +1,5 @@ #import "@preview/tidy:0.4.1" -#import "@preview/cetz:0.3.2": draw, canvas +#import "/src/cetz.typ": draw, canvas #import "src/lib.typ" #import "doc/examples.typ" #import "src/circuit.typ": circuit diff --git a/src/cetz.typ b/src/cetz.typ new file mode 100644 index 0000000..14244d6 --- /dev/null +++ b/src/cetz.typ @@ -0,0 +1 @@ +#import "@preview/cetz:0.3.2": * \ No newline at end of file diff --git a/src/circuit.typ b/src/circuit.typ index f9d41e0..f89389f 100644 --- a/src/circuit.typ +++ b/src/circuit.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": canvas +#import "/src/cetz.typ": canvas #import "@preview/tidy:0.3.0" /// Draws a block circuit diagram diff --git a/src/elements/alu.typ b/src/elements/alu.typ index 9a8cb82..98564e3 100644 --- a/src/elements/alu.typ +++ b/src/elements/alu.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "element.typ" #import "ports.typ": add-port diff --git a/src/elements/block.typ b/src/elements/block.typ index 0fc023b..8b9406a 100644 --- a/src/elements/block.typ +++ b/src/elements/block.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "element.typ" #let draw-shape(id, tl, tr, br, bl, fill, stroke, radius: 0.5em) = { diff --git a/src/elements/element.typ b/src/elements/element.typ index 635fc0b..09adfd3 100644 --- a/src/elements/element.typ +++ b/src/elements/element.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw, coordinate +#import "/src/cetz.typ": draw, coordinate #import "ports.typ": add-ports, add-port #import "../util.typ" diff --git a/src/elements/extender.typ b/src/elements/extender.typ index a1b99e0..cb40ae0 100644 --- a/src/elements/extender.typ +++ b/src/elements/extender.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "element.typ" #import "ports.typ": add-port diff --git a/src/elements/group.typ b/src/elements/group.typ index 1f3e41c..994072c 100644 --- a/src/elements/group.typ +++ b/src/elements/group.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw, coordinate +#import "/src/cetz.typ": draw, coordinate #import "../util.typ" /// Draws a group of elements diff --git a/src/elements/logic/and.typ b/src/elements/logic/and.typ index f32eb21..4b86405 100644 --- a/src/elements/logic/and.typ +++ b/src/elements/logic/and.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "gate.typ" #let draw-shape(id, tl, tr, br, bl, fill, stroke) = { diff --git a/src/elements/logic/buf.typ b/src/elements/logic/buf.typ index 3db75a9..12389a6 100644 --- a/src/elements/logic/buf.typ +++ b/src/elements/logic/buf.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "gate.typ" #let draw-shape(id, tl, tr, br, bl, fill, stroke) = { diff --git a/src/elements/logic/gate.typ b/src/elements/logic/gate.typ index 7350a70..825adbd 100644 --- a/src/elements/logic/gate.typ +++ b/src/elements/logic/gate.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw, coordinate +#import "/src/cetz.typ": draw, coordinate #import "../ports.typ": add-ports, add-port #import "../element.typ" diff --git a/src/elements/logic/iec_and.typ b/src/elements/logic/iec_and.typ index ef4beab..ed51fc3 100644 --- a/src/elements/logic/iec_and.typ +++ b/src/elements/logic/iec_and.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw // #import "iec_gate.typ" as iec-gate #import "iec_gate.typ" as iec-gate diff --git a/src/elements/logic/iec_buf.typ b/src/elements/logic/iec_buf.typ index a327f08..34c8a76 100644 --- a/src/elements/logic/iec_buf.typ +++ b/src/elements/logic/iec_buf.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "iec_gate.typ" as iec-gate diff --git a/src/elements/logic/iec_gate.typ b/src/elements/logic/iec_gate.typ index 9a3b3fd..08d97f1 100644 --- a/src/elements/logic/iec_gate.typ +++ b/src/elements/logic/iec_gate.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw, coordinate +#import "/src/cetz.typ": draw, coordinate #import "../ports.typ": add-ports, add-port #import "../element.typ" diff --git a/src/elements/logic/iec_or.typ b/src/elements/logic/iec_or.typ index 98ac673..0c7836e 100644 --- a/src/elements/logic/iec_or.typ +++ b/src/elements/logic/iec_or.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "iec_gate.typ" as iec-gate /// Draws an IEC-OR gate. This function is also available as `element.iec-gate-or()` diff --git a/src/elements/logic/iec_xor.typ b/src/elements/logic/iec_xor.typ index efbbf83..659c055 100644 --- a/src/elements/logic/iec_xor.typ +++ b/src/elements/logic/iec_xor.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "iec_gate.typ" as iec-gate /// Draws an IEC-XOR gate. This function is also available as `element.iec-gate-xor()` diff --git a/src/elements/logic/or.typ b/src/elements/logic/or.typ index dca0f9b..b3af00e 100644 --- a/src/elements/logic/or.typ +++ b/src/elements/logic/or.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "gate.typ" #let draw-shape(id, tl, tr, br, bl, fill, stroke) = { diff --git a/src/elements/logic/xor.typ b/src/elements/logic/xor.typ index 3f226a8..0ed08f0 100644 --- a/src/elements/logic/xor.typ +++ b/src/elements/logic/xor.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "gate.typ" #let space = 10% diff --git a/src/elements/multiplexer.typ b/src/elements/multiplexer.typ index d7c29eb..bb36b7c 100644 --- a/src/elements/multiplexer.typ +++ b/src/elements/multiplexer.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "../util.typ" #import "element.typ" #import "ports.typ": add-port diff --git a/src/elements/ports.typ b/src/elements/ports.typ index 951fa4a..b24cdfc 100644 --- a/src/elements/ports.typ +++ b/src/elements/ports.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw +#import "/src/cetz.typ": draw #import "../util.typ": rotate-anchor #let add-port( diff --git a/src/wire.typ b/src/wire.typ index cd28365..cbf7c4b 100644 --- a/src/wire.typ +++ b/src/wire.typ @@ -1,4 +1,4 @@ -#import "@preview/cetz:0.3.2": draw, coordinate +#import "/src/cetz.typ": draw, coordinate #import "util.typ": opposite-anchor /// List of valid wire styles